[Cbe-oss-dev] [PATCH 3/5] usb: PS3 EHCI QH read work-around

[Alan Stern]

On Fri, 9 Dec 2011, Geoff Levand wrote:

> On Fri, 2011-12-09 at 10:17 -0500, Alan Stern wrote:
> > On Thu, 8 Dec 2011, Geoff Levand wrote:
> > 
> > > Hi Alan,
> > > 
> > > On Tue, 2011-11-15 at 11:57 -0500, Alan Stern wrote:
> > > > On Tue, 15 Nov 2011, Geoff Levand wrote:
> > > > 
> > > > > PS3 EHCI HC errata fix 244.  The SCC EHCI HC will not correctly perform QH
> > > > > reads that occur near or span a micro-frame boundry.  This is due to a problem
> > > > > in the Nak Count Reload Control logic (EHCI Specification 1.0 Section 4.9.1).
> > > > > 
> > > > > The work-around for this problem is for the HC driver to set I=1 (inactive) for
> > > > > QHs with H=1 (list head).
> > > > > 
> > > > > Signed-off-by: Geoff Levand <geoff at infradead.org>
> > > > > ---
> > > > >  drivers/usb/host/ehci-hcd.c |    1 +
> > > > >  1 files changed, 1 insertions(+), 0 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
> > > > > index e43cb5a..4ff0b7e 100644
> > > > > --- a/drivers/usb/host/ehci-hcd.c
> > > > > +++ b/drivers/usb/host/ehci-hcd.c
> > > > > @@ -621,6 +621,7 @@ static int ehci_init(struct usb_hcd *hcd)
> > > > >  	hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
> > > > >  	hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
> > > > >  	hw->hw_info1 |= cpu_to_hc32(ehci, (2 << 28));	/* RL = 2 */
> > > > > +	hw->hw_info1 |= cpu_to_hc32(ehci, (1 << 7));	/* I = 1 */
> > > > >  	hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
> > > > >  	hw->hw_qtd_next = EHCI_LIST_END(ehci);
> > > > >  	ehci->async->qh_state = QH_STATE_LINKED;
> > > > 
> > > > This should be okay, although the RL stuff isn't needed.  Have you 
> > > > tested it on desktop PCs?
> > > 
> > > I finally got a PC with EHCI setup for testing.  So far it seems to be
> > > working OK.  Are there any specific tests you would like tried?
> > 
> > Nothing special.  I just wanted to make sure it wouldn't crash the
> > whole controller.  If you can use it okay with a flash drive, that's
> > good enough.
> 
> Mass storage is working OK; mkfs, write, read, etc.

Okay.  Although if you wanted to be completely safe, this should be
done only for PS3 controllers.  I was a little worried about the text
in Table 3-19 describing the Inactivate on Next Transaction (I) bit:

	Setting this bit to a one when the queue head is in the
	Asynchronous Schedule or the EPS field indicates a high-speed
	device yields undefined results.

Since this QH is halted and inactive anyways, it shouldn't matter.

> If you give an ack I'll update my for-usb branch with all these fixes
> and ask Greg to pull.  Thanks for your help.

For this patch:  

Acked-by: Alan Stern <stern at rowland.harvard.edu>

Alan Stern