[Cbe-oss-dev] ps3vram performance

[Geoff Levand]

On 10/28/2009 02:45 AM, Siarhei Siamashka wrote:
> An interesting thing to investigate is the "PPE Multithreading" section
> of "Cell Broadband Engine Programming Handbook". Looks like it should be
> possible to tune the priority of the current HW thread so that it will 
> dispatch only one instruction per 32 instructions from the other HW thread.
> TSRL and TSCR registers should control this.
> 
> This way, busylooping for 0.1 ms will still let the other HW thread to run
> almost at full speed.
> 
> But I haven't found any useful references to TSRL and TSCR in the kernel
> sources. How can they be accessed?

You can to use the nop asm codes given in the Handbook.  An example
of db16cyc is in the kernel source file

  arch/powerpc/boot/ps3-head.S

> Will hypervisor even allow tweaking thread
> priorities?

The hypervisor level priorities can not be set by the
kernel.  The others can be set.

-Geoff