[Cbe-oss-dev] arch/powerpc/platforms/cell/pmu.c fix
Denis Joseph Barrow
denis.barrow at sonycom.com
Tue Mar 18 03:51:58 EST 2008
Hi,
Just putting a bit of lipstick on no code functionality changes.
Subject: Cell Performance Measurment Unit
WRITE_WO_MMIO(reg, x) macro etc. is using a cpu in the macro
never defined in the parameter list, this is bad coding style.
I used do it myself & other programmers got upset about it so I stopped.
Signed-off-by: Denis Joseph Barrow <denis.barrow at sonycom.com>
---
arch/powerpc/platforms/cell/pmu.c | 50 +++++++++++++++++++-------------------
1 file changed, 25 insertions(+), 25 deletions(-)
--- a/arch/powerpc/platforms/cell/pmu.c
+++ b/arch/powerpc/platforms/cell/pmu.c
@@ -40,7 +40,7 @@
* pmd_regs.
*/
-#define WRITE_WO_MMIO(reg, x) \
+#define WRITE_WO_MMIO(cpu, reg, x) \
do { \
u32 _x = (x); \
struct cbe_pmd_regs __iomem *pmd_regs; \
@@ -51,14 +51,14 @@
shadow_regs->reg = _x; \
} while (0)
-#define READ_SHADOW_REG(val, reg) \
+#define READ_SHADOW_REG(cpu, val, reg) \
do { \
struct cbe_pmd_shadow_regs *shadow_regs; \
shadow_regs = cbe_get_cpu_pmd_shadow_regs(cpu); \
(val) = shadow_regs->reg; \
} while (0)
-#define READ_MMIO_UPPER32(val, reg) \
+#define READ_MMIO_UPPER32(cpu, val, reg) \
do { \
struct cbe_pmd_regs __iomem *pmd_regs; \
pmd_regs = cbe_get_cpu_pmd_regs(cpu); \
@@ -75,13 +75,13 @@ u32 cbe_read_phys_ctr(u32 cpu, u32 phys_
u32 val_in_latch, val = 0;
if (phys_ctr < NR_PHYS_CTRS) {
- READ_SHADOW_REG(val_in_latch, counter_value_in_latch);
+ READ_SHADOW_REG(cpu, val_in_latch, counter_value_in_latch);
/* Read the latch or the actual counter, whichever is newer. */
if (val_in_latch & (1 << phys_ctr)) {
- READ_SHADOW_REG(val, pm_ctr[phys_ctr]);
+ READ_SHADOW_REG(cpu, val, pm_ctr[phys_ctr]);
} else {
- READ_MMIO_UPPER32(val, pm_ctr[phys_ctr]);
+ READ_MMIO_UPPER32(cpu, val, pm_ctr[phys_ctr]);
}
}
@@ -99,7 +99,7 @@ void cbe_write_phys_ctr(u32 cpu, u32 phy
* The new value is not propagated to the actual counter
* until the performance monitor is enabled.
*/
- WRITE_WO_MMIO(pm_ctr[phys_ctr], val);
+ WRITE_WO_MMIO(cpu, pm_ctr[phys_ctr], val);
pm_ctrl = cbe_read_pm(cpu, pm_control);
if (pm_ctrl & CBE_PM_ENABLE_PERF_MON) {
@@ -166,7 +166,7 @@ u32 cbe_read_pm07_control(u32 cpu, u32 c
u32 pm07_control = 0;
if (ctr < NR_CTRS)
- READ_SHADOW_REG(pm07_control, pm07_control[ctr]);
+ READ_SHADOW_REG(cpu, pm07_control, pm07_control[ctr]);
return pm07_control;
}
@@ -175,7 +175,7 @@ EXPORT_SYMBOL_GPL(cbe_read_pm07_control)
void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val)
{
if (ctr < NR_CTRS)
- WRITE_WO_MMIO(pm07_control[ctr], val);
+ WRITE_WO_MMIO(cpu, pm07_control[ctr], val);
}
EXPORT_SYMBOL_GPL(cbe_write_pm07_control);
@@ -189,35 +189,35 @@ u32 cbe_read_pm(u32 cpu, enum pm_reg_nam
switch (reg) {
case group_control:
- READ_SHADOW_REG(val, group_control);
+ READ_SHADOW_REG(cpu, val, group_control);
break;
case debug_bus_control:
- READ_SHADOW_REG(val, debug_bus_control);
+ READ_SHADOW_REG(cpu, val, debug_bus_control);
break;
case trace_address:
- READ_MMIO_UPPER32(val, trace_address);
+ READ_MMIO_UPPER32(cpu, val, trace_address);
break;
case ext_tr_timer:
- READ_SHADOW_REG(val, ext_tr_timer);
+ READ_SHADOW_REG(cpu, val, ext_tr_timer);
break;
case pm_status:
- READ_MMIO_UPPER32(val, pm_status);
+ READ_MMIO_UPPER32(cpu, val, pm_status);
break;
case pm_control:
- READ_SHADOW_REG(val, pm_control);
+ READ_SHADOW_REG(cpu, val, pm_control);
break;
case pm_interval:
- READ_MMIO_UPPER32(val, pm_interval);
+ READ_MMIO_UPPER32(cpu, val, pm_interval);
break;
case pm_start_stop:
- READ_SHADOW_REG(val, pm_start_stop);
+ READ_SHADOW_REG(cpu, val, pm_start_stop);
break;
}
@@ -229,35 +229,35 @@ void cbe_write_pm(u32 cpu, enum pm_reg_n
{
switch (reg) {
case group_control:
- WRITE_WO_MMIO(group_control, val);
+ WRITE_WO_MMIO(cpu, group_control, val);
break;
case debug_bus_control:
- WRITE_WO_MMIO(debug_bus_control, val);
+ WRITE_WO_MMIO(cpu, debug_bus_control, val);
break;
case trace_address:
- WRITE_WO_MMIO(trace_address, val);
+ WRITE_WO_MMIO(cpu, trace_address, val);
break;
case ext_tr_timer:
- WRITE_WO_MMIO(ext_tr_timer, val);
+ WRITE_WO_MMIO(cpu, ext_tr_timer, val);
break;
case pm_status:
- WRITE_WO_MMIO(pm_status, val);
+ WRITE_WO_MMIO(cpu, pm_status, val);
break;
case pm_control:
- WRITE_WO_MMIO(pm_control, val);
+ WRITE_WO_MMIO(cpu, pm_control, val);
break;
case pm_interval:
- WRITE_WO_MMIO(pm_interval, val);
+ WRITE_WO_MMIO(cpu, pm_interval, val);
break;
case pm_start_stop:
- WRITE_WO_MMIO(pm_start_stop, val);
+ WRITE_WO_MMIO(cpu, pm_start_stop, val);
break;
}
}
--
Denis Barrow
Software Engineer
Sony Network and Software Technology Centre Europe
The Corporate Village
Da Vincilaan 7-D1
B-1935 Zaventem
Belgium
Phone: +32 (0)2 700 8611
Fax: +32 (0)2 700 8622
E-mail: denis.barrow at sonycom.com
Internet: www.sony-europe.com
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