[Cbe-oss-dev] [RFC/PATCH] adding support for direct MBX interrupt on Axon based platform.
Benjamin Herrenschmidt
benh at kernel.crashing.org
Sat May 19 13:18:25 EST 2007
> > We could also factorise somehow the interrupt priority in the hw interrupt
> > number. But I guess that would make a lot of changes.
>
> Yes, it would make the device tree incompatible because the existing
> interrupt numbers would need to change.
Not necessarily... we can do hacks in the translation, but I'd rather
avoid it. I really think using a different class is the way to go.
> The real solution is to fix the device tree so that the mailbox device points
> to the c3p0 as its interrupt parent, instead of the mpic device. Then
> irq_of_parse_and_map will return give you a route to the direct interrupt.
Well, it should point to the iic, not c3po. c3po isn't per-se a PIC,
it's just a bridge. We are happy to ignore it in the interrupt tree.
Just set you class to 0 or 1, and thus put an "interrupts" property in
the format defined for iic with a pointer to the cell iic.
Ben.
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