[Cbe-oss-dev] 64K Page Support for Kexec

[Benjamin Herrenschmidt]

> Thanks.  That is going to require some further research.  I didn't see
> where these pages were added to the page table.  Are they in
> hash_native_64.c also?

There are several code path:

 - In any case, huge pages are added via the C function hash_huge_page()
in arch/powerpc/mm/hugetlbpage.c. I'm thinking about eventually
consolidating that code path with the others some day. We kept it C
instead of asm as it's less performance critical.

 - With 64K base page size disabled, you normally insert with
__hash_page_4K() though with the 64K local store hack, some pages might
be inserted with __hash_page_64K (not in current upstream but in the SDK
kernel).

 - With 64K base page size enabled, you normally insert with
__hash_page_64K. However, there are cases where 4K pages might be
inserted too, either because we have a processor that forces
non-cacheable pages to be 4K or because some drivers forces it (this
isn't upstream yet, but for example, the ehca stuff will force us to do
that). Thus it's possible to have a mix of 4K and 64K pages in the hash
table with PAGE_SIZE set to 64K

The good news is that your code does know the page size, and thus should
be able to pass it to slot2va() to do the right thing...

Cheers
Ben.