[Cbe-oss-dev] [patch 11/13] cell: driver for DDR2 memory on AXON

[Andrew Morton]

On Wed, 18 Jul 2007 18:04:50 +0200
Arnd Bergmann <arnd at arndb.de> wrote:

> From: Maxim Shchetynin <maxim at de.ibm.com>
> The Axon bridge chip used on new Cell/B.E. based blade servers
> comes with a DDR2 memory controller that can be used to
> attach cheap memory modules, as opposed to the high-speed
> XDR memory that is used by the CPU itself.
> 
> Since the memory controller does not participate in the
> cache coherency protocol, we can not use the memory direcly
> for Linux applications, but by providing a block device
> it can be used for swap space, temporary file storage and
> through the use of the direct_access block device operation
> for mapping into user addresses, when it is mounted with
> an appropriate file system.
> 
> Signed-off-by: Maxim Shchetynin <maxim at de.ibm.com>
> Signed-off-by: Arnd Bergmann <arnd.bergmann at de.ibm.com>
> 
> ...
>
> +/**
> + * axon_ram_open - open() method for device
> + * @inode, @file: see file_operations method
> + */
> +static int
> +axon_ram_open(struct inode *inode, struct file *file)
> +{
> +	inode->i_bdev->bd_block_size = AXON_RAM_BLOCK_SIZE;
> +
> +	return 0;
> +}

This looks fishy.  There are a bunch of helpers in fs/block-dev.c which are
supposed to set bd_block_size, but here we are open-coding it within a
particular blockdev driver.

I note that rd.c does the same thing, which is presumably where this came
from.  Could be that rd.c is simply misbehaving.  Perhaps Christoph could
opine?