[Cbe-oss-dev] [RFC 4/9] AXON - Ethernet over PCI-E driver

[Jean-Christophe Dubois]

On Wednesday 03 January 2007 21:47, Benjamin Herrenschmidt wrote:
> Can't you be more sneaky here ? That is, have a separate pair of shared
> areas with processed packet indices and put in the DMA command buffer
> commands that will update that along with commands that will eventually
> write to the register that generates an MSI ? :-)

We are already using chained DMA to write the DATA and then the interrupt in 
one command packet chain...

BTW, please note that on Axon 1.1 MSI are broken (either in Root complex mode 
or End point mode). Things should be fixed in Axon 2.0 (according to IBM)

My quick prototype with a NAPI like design is providing me a lot more stable 
bandwith. Now whatever the packet size (from 200 bytes to 64KB) the bandwith 
is around 2Gb/s.

previously, I had 5Gb/s for large packets (32KB or 64KB) and down to 30 Mb/s 
for small packets (1000 bytes).

So I am not sure yet why the bandwith for large packets is lower (should be 
the same?) but the performance boost for small packets is nice.

JC


>
> Ben.