[Cbe-oss-dev] Is there machine-level single stepping on the SPE?

Ulrich Weigand Ulrich.Weigand at de.ibm.com
Fri Dec 14 02:43:19 EST 2007


John,

> Is it possible to machine-level single-step an SPE thread? That is, 
> is there a single-step trace-bit or some other way to cause the SPE 
> hardware to execute 1 instruction, and then stop?

> I understand that it is possible to emulate single-step by planting 
> breakpoints and running the SPE thread, but that requires knowledge 
> of the instruction set. It's not a big deal, but if the hardware or 
> operating system already supports it, it would save time.

There is a "single-step mode" bit in the SPU priviledged control
register.  However:
- the hardware actually implements this not as stepping a single
  instruction; depending on the fetch and issue rules, a group
  consisting of more than one instruction may be executed
- there is no (functioning) kernel interface to request this mode
  to be set at the moment

The intent is that if you use ptrace (PT_SINGLESTEP) to step
into an spu_run system call, the kernel will in addition set the
SPU hardware single-step mode, so you'll get the next trap
with the PPE still on the spu_run system call, and the SPU 
having advanced one instruction (group). This is not yet
(fully) functional in current kernels however.

GDB always uses emulated single-step by setting breakpoints.


Mit freundlichen Gruessen / Best Regards

Ulrich Weigand

-- 
  Dr. Ulrich Weigand | Phone: +49-7031/16-3727
  GNU compiler/toolchain for Linux on System z and Cell BE
  IBM Deutschland Entwicklung GmbH
  Vorsitzender des Aufsichtsrats: Martin Jetter | Geschäftsführung: 
Herbert Kircher
  Sitz der Gesellschaft: Böblingen | Registergericht: Amtsgericht 
Stuttgart, HRB 243294




More information about the cbe-oss-dev mailing list