[Cbe-oss-dev] [PATCH 7/9] spufs: limit saving MFC_CNTL bits

[HYEONSEUNG JANG]

After applying the patch, It can causes the following behavior :

  In the saving step, save_mfc_cntl() always sets CSA MFC_CNTL[Q] to be '0',
  which means 'not empty' *ignoring current SPU MFC_CNTL[Q]*.
  save_mfc_queues() checks current SPU MFC_CNTL[Q] to decide whether to
  save MFC queue context or not.

  In the restoring step, restore_mfc_queues() checks CSA MFC_CNTL[Q] before
  restoring MFC queue context.

  For example, when current SPU MFC_CNTL[Q] is 1, 'empty', in the saving
  step. it ends up restoring old, _garbage_, MFC queue in
  restore_mfc_queues() because CSA MFC_CNTL[Q] is always 'not empty' and
  it can lead to wrong DMA being initiated after restoring step.


I think we must save at least MFC_CNTL_DMA_QUEUES_EMPTY field like the following. 
( note that below patch should be applied after the original patch)


diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index 27ffdae..d222355 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -194,6 +194,8 @@ static inline void save_mfc_cntl(struct spu_state *csa, struct spu *spu)
                }
                break;
        }
+
+       csa->priv2.mfc_control_RW |= in_be64(&priv2->mfc_control_RW) & MFC_CNTL_DMA_QUEUES_EMPTY_MASK;
 }
 
 static inline void save_spu_runcntl(struct spu_state *csa, struct spu *spu)



> -----Original Message-----
> From: cbe-oss-dev-bounces+hs8848.jang=samsung.com at ozlabs.org 
> [mailto:cbe-oss-dev-bounces+hs8848.jang=samsung.com at ozlabs.org
> ] On Behalf Of Masato Noguchi
> Sent: Friday, July 13, 2007 4:47 PM
> To: cbe-oss-dev at ozlabs.org
> Subject: [Cbe-oss-dev] [PATCH 7/9] spufs: limit saving MFC_CNTL bits
> 
> 
> 
> At save step 8, the mfc control register in the CSA should be 
> written _only_ with Sc and Sm bits. (at least MFC_CNTL[Dh] 
> should be set to '0')
> 
> Signed-off-by: Masato Noguchi <Masato.Noguchi at jp.sony.com>
> ---
> 
>  arch/powerpc/platforms/cell/spufs/switch.c |   13 ++++---------
>  1 file changed, 4 insertions(+), 9 deletions(-)
> 
> Index: linux-2.6/arch/powerpc/platforms/cell/spufs/switch.c
> ===================================================================
> --- linux-2.6.orig/arch/powerpc/platforms/cell/spufs/switch.c
> +++ linux-2.6/arch/powerpc/platforms/cell/spufs/switch.c
> @@ -180,7 +180,7 @@ static inline void save_mfc_cntl(struct 
>  	case MFC_CNTL_SUSPEND_COMPLETE:
>  		if (csa) {
>  			csa->priv2.mfc_control_RW =
> -				in_be64(&priv2->mfc_control_RW) |
> +				MFC_CNTL_SUSPEND_MASK |
>  				MFC_CNTL_SUSPEND_DMA_QUEUE;
>  		}
>  		break;
> @@ -190,9 +190,7 @@ static inline void save_mfc_cntl(struct 
>  				  MFC_CNTL_SUSPEND_DMA_STATUS_MASK) ==
>  				 MFC_CNTL_SUSPEND_COMPLETE);
>  		if (csa) {
> -			csa->priv2.mfc_control_RW =
> -				in_be64(&priv2->mfc_control_RW) &
> -				~MFC_CNTL_SUSPEND_DMA_QUEUE;
> +			csa->priv2.mfc_control_RW = 0;
>  		}
>  		break;
>  	}
> @@ -251,11 +249,8 @@ static inline void save_mfc_decr(struct 
>  	 *     Read MFC_CNTL[Ds].  Update saved copy of
>  	 *     CSA.MFC_CNTL[Ds].
>  	 */
> -	if (in_be64(&priv2->mfc_control_RW) & 
> MFC_CNTL_DECREMENTER_RUNNING) {
> -		csa->priv2.mfc_control_RW |= 
> MFC_CNTL_DECREMENTER_RUNNING;
> -	} else {
> -		csa->priv2.mfc_control_RW &= 
> ~MFC_CNTL_DECREMENTER_RUNNING;
> -	}
> +	csa->priv2.mfc_control_RW |=
> +		in_be64(&priv2->mfc_control_RW) & 
> MFC_CNTL_DECREMENTER_RUNNING;
>  }
>  
>  static inline void halt_mfc_decr(struct spu_state *csa, 
> struct spu *spu)
> 
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