[Cbe-oss-dev] [PATCH 04/13] cell: remove broken __setup_cpu_be function

Geoff Levand geoffrey.levand at am.sony.com
Sat May 6 10:00:41 EST 2006


Paul Mackerras wrote:
> Arnd Bergmann writes:
> 
>>  From: Geoff Levand <geoffrey.levand at am.sony.com>
>> 
>> This patch removes the incorrect Cell processor setup routine
>> __setup_cpu_be.  This routine improperly accesses the hypervisor
>> page size configuration at SPR HID6.  The correct behavior is for
>> firmware, or if needed, platform setup code, to set the correct
>> page size.
> 
>> -		.cpu_setup		= __setup_cpu_be,
>> +		.cpu_setup		= __setup_cpu_power4,
> 
> That looks a bit dodgy.  Either just remove the contents of
> __setup_cpu_be (leaving only the blr), or define a __setup_cpu_null
> that does nothing, or make the identify_cpu not call the cpu setup
> function if the pointer is NULL.


OK, I set it up with __setup_cpu_null.  An updated patch follows.

It falls out from this that we can replace the do-nothing routines
__setup_cpu_power3 and __setup_cpu_power4 with __setup_cpu_null also.
I'll post a separate patch for consideration.

-Geoff


Replaced the Cell processor specific routine __setup_cpu_be with
a new generic routine __setup_cpu_null.  __setup_cpu_be improperly
accessed the hypervisor page size configuration at SPR HID6.  Correct
behavior is for firmware, or if needed, platform setup code, to set
the correct page size.


Signed-off-by: Geoff Levand <geoffrey.levand at am.sony.com>


Index: cell--alp--3/arch/powerpc/kernel/cpu_setup_power4.S
===================================================================
--- cell--alp--3.orig/arch/powerpc/kernel/cpu_setup_power4.S	2006-04-26 19:19:25.000000000 -0700
+++ cell--alp--3/arch/powerpc/kernel/cpu_setup_power4.S	2006-05-05 15:59:58.000000000 -0700
@@ -76,20 +76,6 @@
 _GLOBAL(__setup_cpu_power4)
 	blr

-_GLOBAL(__setup_cpu_be)
-        /* Set large page sizes LP=0: 16MB, LP=1: 64KB */
-        addi    r3, 0,  0
-        ori     r3, r3, HID6_LB
-        sldi    r3, r3, 32
-        nor     r3, r3, r3
-        mfspr   r4, SPRN_HID6
-        and     r4, r4, r3
-        addi    r3, 0, 0x02000
-        sldi    r3, r3, 32
-        or      r4, r4, r3
-        mtspr   SPRN_HID6, r4
-	blr
-
 _GLOBAL(__setup_cpu_ppc970)
 	mfspr	r0,SPRN_HID0
 	li	r11,5			/* clear DOZE and SLEEP */
Index: cell--alp--3/arch/powerpc/kernel/cputable.c
===================================================================
--- cell--alp--3.orig/arch/powerpc/kernel/cputable.c	2006-04-26 19:19:25.000000000 -0700
+++ cell--alp--3/arch/powerpc/kernel/cputable.c	2006-05-05 16:29:06.000000000 -0700
@@ -31,9 +31,9 @@
  * and ppc64
  */
 #ifdef CONFIG_PPC64
+extern void __setup_cpu_null(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
-extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
 #else
 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
@@ -273,7 +273,7 @@
 			PPC_FEATURE_SMT,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
-		.cpu_setup		= __setup_cpu_be,
+		.cpu_setup		= __setup_cpu_null,
 		.platform		= "ppc-cell-be",
 	},
 	{	/* default match */
Index: cell--alp--3/arch/powerpc/kernel/misc_64.S
===================================================================
--- cell--alp--3.orig/arch/powerpc/kernel/misc_64.S	2006-04-26 19:19:25.000000000 -0700
+++ cell--alp--3/arch/powerpc/kernel/misc_64.S	2006-05-05 16:04:59.000000000 -0700
@@ -768,6 +768,9 @@

 #endif /* CONFIG_ALTIVEC */

+_GLOBAL(__setup_cpu_null)
+	blr
+
 _GLOBAL(__setup_cpu_power3)
 	blr




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