[Cbe-oss-dev] [FYI/RFC] cell: setting up SMM_HID
Arnd Bergmann
arnd.bergmann at de.ibm.com
Mon Apr 10 19:35:17 EST 2006
It turns out that the page sizes for an SPE are not
controlled by HID6 but rather by SMM_HID in the
hypervisor register space (priv1) of each SPE.
Unfortunately, the firmware does not set these
up so far (even the one that does set up HID6),
so we have to do it ourselves. This is not the real
solution, since we cannot simply hardcode this
when the firmware might change.
Need some discussion with the firmware developers
about this.
Cc: Hartmut Penner <hpenner at de.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann at de.ibm.com>
---
Index: linus-2.6/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_base.c
+++ linus-2.6/arch/powerpc/platforms/cell/spu_base.c
@@ -655,6 +655,7 @@ static int __init create_spu(struct devi
spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1));
spu_mfc_sr1_set(spu, 0x33);
+ spu_smm_pgsz_set(spu, 0x2);
spu->ibox_callback = NULL;
spu->wbox_callback = NULL;
Index: linus-2.6/arch/powerpc/platforms/cell/spu_priv1.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_priv1.c
+++ linus-2.6/arch/powerpc/platforms/cell/spu_priv1.c
@@ -102,6 +102,15 @@ u64 spu_mfc_tclass_id_get(struct spu *sp
}
EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
+void spu_smm_pgsz_set(struct spu *spu, u64 pgsz)
+{
+ u64 smm_hid;
+ smm_hid = in_be64(&spu->priv1->smm_hid);
+ smm_hid &= ~(0xfull << 60);
+ smm_hid |= pgsz << 60;
+ out_be64(&spu->priv1->smm_hid, smm_hid);
+}
+
void spu_tlb_invalidate(struct spu *spu)
{
out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
Index: linus-2.6/include/asm-powerpc/spu.h
===================================================================
--- linus-2.6.orig/include/asm-powerpc/spu.h
+++ linus-2.6/include/asm-powerpc/spu.h
@@ -204,6 +204,7 @@ void spu_mfc_sr1_set(struct spu *spu, u6
u64 spu_mfc_sr1_get(struct spu *spu);
void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id);
u64 spu_mfc_tclass_id_get(struct spu *spu);
+void spu_smm_pgsz_set(struct spu *spu, u64 pgsz);
void spu_tlb_invalidate(struct spu *spu);
void spu_resource_allocation_groupID_set(struct spu *spu, u64 id);
u64 spu_resource_allocation_groupID_get(struct spu *spu);
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