[Pdbg] [PATCH] libpdbg/p9chip.c: fix ram instruction status sequence

[Nicholas Piggin]

This comes from the workbook. Without this, some types of mfspr
loops forever despite having completed with bit 1 status set.

Signed-off-by: Nicholas Piggin <npiggin at gmail.com>
---
One last issue I noticed. After this patch, the regs command I'm
writing works quite nicely to dump registers:

root at r222:~# /usr/local/bin/pdbg -p1 -c0 -t0 regs
NIA : 0xc000000000004c30
CFAR: 0x0000000136bc1810
MSR : 0x9000000000001033
LR  : 0x0000000136bc853c
CTR : 0x00007fff87ada240
TAR : 0x0000000000000000
CR  : 0x28000482
XER : 0x20040000
GPRS:
 0x0000000000000004 0x00007fffc2921ce0 0x00007fff87a27300 0x0000000000000001
 0x0000000144801280 0x0000000000002000 0x0000000000004000 0x00007fff8795dca8
 0x900000000000d033 0x00007fff87ada240 0x0000000000000002 0x00007fff8795dca8
 0x900000000000d033 0xc000200fff7ff300 0x0000000000000000 0x0000000000000000
 0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000
 0x0000000000000000 0x0000000000000000 0x0000000000000008 0x0000000000000020
 0x0000000136bcb628 0x00007fffc2922278 0x0000000000000001 0x0000000000000001
 0x0000000144801280 0x0000000000000000 0x000000007fffe000 0x0000000000002000
LPCR : 0x0040400001d2f012
PTCR : 0x0000200fff7e0004
LPIDR: 0x0000000000000000
PIDR : 0x0000000000080065
HDSISR: 0x00000000
HDAR : 0x0000000000000000
HSRR0: 0xc00000000009ad88
HSRR1: 0x9000000000009033
HDEC : 0xffffff2c8192e14f
HSPRG0: 0xc000200fff7ff300
HSPRG1: 0xc000200fff7ff300
DSISR: 0x40000000
DAR  : 0x00007fff876c23f4
SRR0 : 0x00007fff8795dca8
SRR1 : 0x900000000000d033
DEC  : 0xfffffffdd213c2d9
TB   : 0x000000e1514fda21
SPRG0: 0x0000000000000000
SPRG1: 0x0000000000000000
SPRG2: 0x0000000000000000
SPRG3: 0x0000000000000000

---
 libpdbg/p9chip.c | 18 +++++++++++++-----
 1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c
index 8c03476..10b1ec8 100644
--- a/libpdbg/p9chip.c
+++ b/libpdbg/p9chip.c
@@ -236,11 +236,19 @@ static int p9_ram_instruction(struct thread *thread, uint64_t opcode, uint64_t *
 	value = SETFIELD(PPC_BITMASK(2, 5), value, predecode);
 	value = SETFIELD(PPC_BITMASK(8, 39), value, opcode);
 	CHECK_ERR(thread_write(thread, P9_RAM_CTRL, value));
-	do {
-		CHECK_ERR(thread_read(thread, P9_RAM_STATUS, &value));
-		if (((value & PPC_BIT(0)) || (value & PPC_BIT(2))))
-			return 1;
-	} while (!(value & PPC_BIT(1) && !(value & PPC_BIT(3))));
+
+	CHECK_ERR(thread_read(thread, P9_RAM_STATUS, &value));
+	if (((value & PPC_BIT(0)) || (value & PPC_BIT(2))))
+		return 1;
+	else if (!(value & PPC_BIT(1)))
+		printf("RAM opcode=%llx had status=%llx\n", opcode, value);
+
+	if ((opcode & OPCODE_MASK) == LD_OPCODE) {
+		while (!(value & PPC_BIT(3))) {
+			CHECK_ERR(thread_read(thread, P9_RAM_STATUS, &value));
+		}
+	}
+
 	CHECK_ERR(thread_read(thread, P9_SCR0_REG, scratch));
 
 	return 0;
-- 
2.17.0