<html><body><p><font size="2">> </font><tt><font size="2">Oh, so in effect I can treat it as 'hard coded' for my purposes</font></tt><br><font size="2">Yeah, for now that is fine, especially if you are only using single-socket systems.</font><br><font size="2"><br>--<br>Dan Crowell<br>Senior Software Engineer - Power Systems Enablement Firmware<br>IBM Rochester: t/l 553-2987<br>dcrowell@us.ibm.com</font><br><br><img width="16" height="16" src="cid:1__=09BB0C92DFD9E5C98f9e8a93df938690918c09B@" border="0" alt="Inactive hide details for "Marty E. Plummer" ---10/14/2020 12:05:27 AM---On Wed, Oct 07, 2020 at 03:55:09AM +0000, Daniel M Cro"><font size="2" color="#424282">"Marty E. Plummer" ---10/14/2020 12:05:27 AM---On Wed, Oct 07, 2020 at 03:55:09AM +0000, Daniel M Crowell wrote: > If there is no functional memory</font><br><br><font size="2" color="#5F5F5F">From: </font><font size="2">"Marty E. Plummer" <hanetzer@startmail.com></font><br><font size="2" color="#5F5F5F">To: </font><font size="2">Daniel M Crowell <dcrowell@us.ibm.com></font><br><font size="2" color="#5F5F5F">Cc: </font><font size="2">openpower-firmware@lists.ozlabs.org</font><br><font size="2" color="#5F5F5F">Date: </font><font size="2">10/14/2020 12:05 AM</font><br><font size="2" color="#5F5F5F">Subject: </font><font size="2">[EXTERNAL] Re: [OpenPower-Firmware] LPC Address space questions</font><br><hr width="100%" size="2" align="left" noshade style="color:#8091A5; "><br><br><br><tt><font size="2">On Wed, Oct 07, 2020 at 03:55:09AM +0000, Daniel M Crowell wrote:<br>> If there is no functional memory behind proc0 we will remap the fabric id to maintain memory at physical<br>> address zero. This results in the entire MMIO space to be remapped as well, including the LPC space. Check<br>> out targetservicestart.C for some of the logic. That should give a basic idea of all of the attributes<br>> involved. It is the SBE logic that sets up the LPC and XSCOM BAR, the values to use are customized into the<br>> SEEPROM by Hostboot based on the attributes that exist there. The SBE pushes the BAR values up as part of the<br>> communication area it leaves around for HBBL to consume. HBBL then pushes it to HB.<br>> <br>Oh, so in effect I can treat it as 'hard coded' for my purposes, since<br>I'm not modifying the SBE firmware atm? (well, aside from maybe<br>inserting a replacment hbbl into it)?<br>> <a href="https://github.com/open-power/hostboot/blob/master/src/include/arch/memorymap.H">https://github.com/open-power/hostboot/blob/master/src/include/arch/memorymap.H</a> has some more information on<br>> how the memory map is organized.<br>> <a href="https://github.com/open-power/hostboot/blob/master/src/usr/targeting/common/processMrw.pl#L1442">https://github.com/open-power/hostboot/blob/master/src/usr/targeting/common/processMrw.pl#L1442</a> shows some<br>> computation to set the values.<br><br></font></tt><br><br><BR>
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