<html><body><p><tt><font size="2">Hi Marty,</font></tt><br><br><tt><font size="2">> I have a few additional questions about early hostboot on the power9<br>> platform.<br>> <br>> I know pdbg has a gdbserver which currently only works on p8 and linux<br>> kernel (though I may be misinterpreting the latter half). I assume the<br>> lack of power9 support is just some missing code for now, but I wonder<br>> about only supporting the linux kernel. Is there some deep-seated reason<br>> one could not use gbdserver on hostboot itself? It could be very useful<br>> for early debugging.<br></font></tt><br><tt><font size="2">Stewart is correct -- there is just a different way of accessing the memory</font></tt><br><tt><font size="2">(getmempba versus getmemproc). I know that the IBM's SBE team had a </font></tt><br><tt><font size="2">prototype of gdbg working against hostboot a while back. I've copied</font></tt><br><tt><font size="2">them on this email to see if it is still viable (there were some issues</font></tt><br><tt><font size="2">with the virtual pages for the extended image, but if you are only </font></tt><br><tt><font size="2">using it for early debug -- might not be an issue).</font></tt><br><br><tt><font size="2">> <br>> Power9 processors are able to operate in both BE and LE mode, and I am<br>> having a bit of issue following this idea. Is there some register one<br>> sets to switch mode I'm missing, or does the processor just 'know' that<br>> 0xdeadbeef and 0xefbeadde are the same? Forgive me if this is a bad<br>> example but hopefully it gets my point across. In addition, is there any<br>> reason that hostboot couldn't be ran in either big or little endian<br>> (after endian specific code is fixed, obviously)?</font></tt><br><br><tt><font size="2">There is nothing that prevents Hostboot from running LE mode -- just </font></tt><br><tt><font size="2">the amount of work to port it :)</font></tt><br><br><tt><font size="2">MSR bit 63 controls the LE/BE mode (where 0b0 is BE, 0b1 is LE). If</font></tt><br><tt><font size="2">you want to trampoline early in HB to switch you can setup the srr0/1</font></tt><br><tt><font size="2">and then rfid to make it take effect. You could hook it into the </font></tt><br><tt><font size="2">following code from </font></tt><a href="https://github.com/open-power/hostboot/blob/master/src/kernel/start.S"><tt><font size="2">https://github.com/open-power/hostboot/blob/master/src/kernel/start.S</font></tt></a><br><tt><font size="2">(note that this part would need to be BE, all code after _start_postmsr</font></tt><br><tt><font size="2">would need to be LE)</font></tt><br><br><tt><font size="2">.global _start</font></tt><br><tt><font size="2">_start:</font></tt><br><tt><font size="2"> ;// Set thread priority high.</font></tt><br><tt><font size="2"> or 2,2,2</font></tt><br><br><tt><font size="2"> ;// Clear MSR[TA] (bit 1)</font></tt><br><tt><font size="2"> mfmsr r2</font></tt><br><tt><font size="2"> rldicl r2,r2,1,1 ;// Clear bit 1 - result [1-63,0]</font></tt><br><tt><font size="2"> rotrdi r2,r2,1 ;// Rotate right 1 - result [0,63]</font></tt><br><tt><font size="2"> ;// Set up SRR0 / SRR1 to enable new MSR.</font></tt><br><tt><font size="2"> mtsrr1 r2</font></tt><br><tt><font size="2"> li r2, _start_postmsr@l</font></tt><br><tt><font size="2"> mtsrr0 r2</font></tt><br><tt><font size="2"> lis r9,49 ;// Want to default the NAP value</font></tt><br><tt><font size="2"> ori r9,r9,1 ;// Value is 0x0000000000310001</font></tt><br><tt><font size="2"> mtspr 855,r9 ;// set actual PSSCR</font></tt><br><tt><font size="2"> rfid</font></tt><br><br><br><tt><font size="2">Or you can write the MSR in the SBE code where it manipulates </font></tt><br><tt><font size="2">the starting threads architected state:</font></tt><br><a href="https://github.com/open-power/sbe/blob/master/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C"><tt><font size="2">https://github.com/open-power/sbe/blob/master/src/import/chips/p9/procedures/hwp/nest/p9_sbe_load_bootloader.C</font></tt></a><br><tt><font size="2"><br></font></tt><br><font size="2">Dean Sanner<br>dsanner@us.ibm.com<br></font><BR>
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