<div dir="ltr"><div>The comments have been addressed and the new patch has been added,<br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, Jun 17, 2022 at 10:12 PM Patrick Williams <<a href="mailto:patrick@stwcx.xyz">patrick@stwcx.xyz</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Thu, Jun 16, 2022 at 05:37:07PM +0530, Logananth Sundararaj wrote:<br>
> The Yosemite V3.5 is a facebook multi-node server<br>
> platform that host four OCP server. The BMC<br>
> in the Yosemite V3.5 platform based on AST2600 SoC.<br>
> <br>
> This patch adds linux device tree entry related to<br>
> Yosemite V3.5 specific devices connected to BMC SoC.<br>
> <br>
> Signed-off-by: Logananth Sundararaj <<a href="mailto:logananth_s@hcl.com" target="_blank">logananth_s@hcl.com</a>><br>
> <br>
> ---<br>
> --- v2 - Enabled i2c drivers.<br>
> --- v1 - Initial draft.<br>
> ---<br>
>  arch/arm/boot/dts/Makefile                    |   1 +<br>
>  .../boot/dts/aspeed-bmc-facebook-fby35.dts    | 277 ++++++++++++++++++<br>
>  2 files changed, 278 insertions(+)<br>
>  create mode 100644 arch/arm/boot/dts/aspeed-bmc-facebook-fby35.dts<br>
<br>
A few comments below.<br>
<br>
...<br>
> +&uart5 {<br>
> +     status = "okay";<br>
> +     /* Workaround for AST2600 A0 */<br>
> +     compatible = "snps,dw-apb-uart";<br>
> +};<br>
<br>
Is this comment accurate?  Are we using A0 hardware on this system?<br>
<br></blockquote><div><br></div><div>Done.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
> +&fmc {<br>
> +     status = "okay";<br>
> +     reg = <0x1e620000 0xc4>, <0x20000000 0x8000000>;<br>
> +     flash@0 {<br>
> +             status = "okay";<br>
> +             m25p,fast-read;<br>
> +             label = "spi0.1";<br>
> +             spi-max-frequency = <50000000>;<br>
> +             spi-tx-bus-width = <2>;<br>
> +             spi-rx-bus-width = <2>;<br>
> +             #include "openbmc-flash-layout-64.dtsi"<br>
> +     };<br>
> +};<br>
<br>
Aren't there two SPI flashes?  It seems like it based on:<br>
<a href="https://github.com/facebook/openbmc-linux/blob/dev-5.10/arch/arm/boot/dts/aspeed-bmc-facebook-fby35.dts#L162" rel="noreferrer" target="_blank">https://github.com/facebook/openbmc-linux/blob/dev-5.10/arch/arm/boot/dts/aspeed-bmc-facebook-fby35.dts#L162</a><br>
<br></blockquote><div><br></div><div>yes, two flashes have been added.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
> +<br>
> +&spi1 {<br>
> +     status = "okay";<br>
> +     pinctrl-names = "default";<br>
> +     pinctrl-0 = <&pinctrl_spi1_default>;<br>
> +<br>
> +     flash@0 {<br>
> +             status = "okay";<br>
> +             m25p,fast-read;<br>
> +             label = "pnor";<br>
> +             spi-rx-bus-width = <4>;<br>
> +             spi-max-frequency = <100000000>;<br>
> +     };<br>
> +};<br>
<br>
What is SPI1 used for?  I don't see it in the facebook/openbmc-linux<br>
DTS.<br>
<br></blockquote><div><br></div><div>Done.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
> -- <br>
> 2.17.1<br>
> <br>
<br>
Are we missing the pwm/tach support?  Or is that still not upstream from<br>
Aspeed?<br>
<br></blockquote><div><br></div><div>yes, pwm/tach support is haven't been upstream from the Aspeed for ast2600.<br></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
-- <br>
Patrick Williams<br></blockquote><div><br></div><div>Sorry for the late reply Patrick, missed replying.</div><div>Thanks.<br></div><div>Logananth<br></div></div></div>