<div class="socmaildefaultfont" dir="ltr" style="font-family:Arial, Helvetica, sans-serif;font-size:10pt" ><div dir="ltr" style="font-family:Arial, Helvetica, sans-serif;font-size:10pt" ><div dir="ltr" >Hi,</div>
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<div dir="ltr" >thanks for point that the right address and help sending upstream.</div>
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<div dir="ltr" >Jet</div>
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<blockquote data-history-content-modified="1" data-history-expanded="1" dir="ltr" style="border-left:solid #aaaaaa 2px; margin-left:5px; padding-left:5px; direction:ltr; margin-right:0px" >----- Original message -----<br>From: Santosh Puranik <santosh.puranik.ibm@gmail.com><br>To: Jet Li <Jet.Le@ibm.com><br>Cc: Joel Stanley <joel@jms.id.au>, Andrew Jeffery <andrew@aj.id.au>, Jet Li <Jet.Li@ibm.com>, OpenBMC Maillist <openbmc@lists.ozlabs.org><br>Subject: [EXTERNAL] Re: [PATCH linux dev-5.8 v2] ARM: dts: aspeed: rainier: Add I2C buses for NVMe use<br>Date: Thu, Sep 3, 2020 1:16 AM<br> 
<div><font face="Default Monospace,Courier New,Courier,monospace" size="2" >Hi,<br><br>On 9/1/20 11:53 AM, Joel Stanley wrote:<br>> Hello,<br>><br>> On Tue, 1 Sep 2020 at 06:19, Jet Li <Jet.Le@ibm.com> wrote:<br>>> From: Jet Li <Jet.Li@ibm.com><br>>><br>>> Adding pca9552 exposes the presence detect lines for the cards and<br>>> tca9554 exposes the presence details for the cards.<br><br>This change looks incorrect. Per the Rainier workbook,<br><br>there is no TCA chip at 0x40 on i2c0. The chip is at 0x20<br><br>and only has presence GPIOs (inputs).<br><br>Why is this using a gpio-hog to set this as an output?<br><br>--<br><br>Santosh<br><br>> This patch is already in dev-5.8 as a3ce4e380958571814bbf3e237e6496d5b35153b.<br>><br>> Cheers,<br>><br>> Joel<br>><br>>> Signed-off-by: Jet Li <Jet.Li@ibm.com><br>>> Signed-off-by: Joel Stanley <joel@jms.id.au><br>>> ---<br>>>   arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 105 +++++++++++++++++++++++++++<br>>>   1 file changed, 105 insertions(+)<br>>><br>>> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts<br>>> index d20cdf3c..e803133 100644<br>>> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts<br>>> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts<br>>> @@ -300,6 +300,21 @@<br>>>                  compatible = "atmel,24c64";<br>>>                  reg = <0x51>;<br>>>          };<br>>> +<br>>> +       tca9554@40 {<br>>> +               compatible = "ti,tca9554";<br>>> +               reg = <0x40>;<br>>> +               gpio-controller;<br>>> +               #gpio-cells = <2>;<br>>> +<br>>> +               smbus0 {<br>>> +                       gpio-hog;<br>>> +                       gpios = <4 GPIO_ACTIVE_HIGH>;<br>>> +                       output-high;<br>>> +                       line-name = "smbus0";<br>>> +               };<br>>> +       };<br>>> +<br>>>   };<br>>><br>>>   &i2c1 {<br>>> @@ -614,6 +629,96 @@<br>>>                  compatible = "atmel,24c64";<br>>>                  reg = <0x51>;<br>>>          };<br>>> +<br>>> +       pca1: pca9552@61 {<br>>> +               compatible = "nxp,pca9552";<br>>> +               reg = <0x61>;<br>>> +               #address-cells = <1>;<br>>> +               #size-cells = <0>;<br>>> +               gpio-controller;<br>>> +               #gpio-cells = <2>;<br>>> +<br>>> +               gpio@0 {<br>>> +                       reg = <0>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@1 {<br>>> +                       reg = <1>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@2 {<br>>> +                       reg = <2>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@3 {<br>>> +                       reg = <3>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@4 {<br>>> +                       reg = <4>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@5 {<br>>> +                       reg = <5>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@6 {<br>>> +                       reg = <6>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@7 {<br>>> +                       reg = <7>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@8 {<br>>> +                       reg = <8>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@9 {<br>>> +                       reg = <9>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@10 {<br>>> +                       reg = <10>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@11 {<br>>> +                       reg = <11>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@12 {<br>>> +                       reg = <12>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@13 {<br>>> +                       reg = <13>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@14 {<br>>> +                       reg = <14>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +<br>>> +               gpio@15 {<br>>> +                       reg = <15>;<br>>> +                       type = <PCA955X_TYPE_GPIO>;<br>>> +               };<br>>> +       };<br>>> +<br>>>   };<br>>><br>>>   &i2c9 {<br>>> --<br>>> 2.7.4<br>>></font><br> </div></blockquote>
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