<div dir="ltr"><div dir="ltr">Hi Jonathan,<div><br></div><div>Thanks for the clarification,</div><div><br></div><div> I will like to to Modify the NPCM ADC dt-binding document (<a href="https://patchwork.ozlabs.org/patch/1022527/">https://patchwork.ozlabs.org/patch/1022527/</a> - removing rst node).</div><div><br></div><div>To send a new commit to the iio.git testing branch or to send a new patch version?</div><div><br></div><div>Thanks,</div><div><br></div><div>Tomer</div></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail-m_-7544673861919322502gmail-m_7523592715727817579gmail-m_-4599046323260618770gmail_attr">On Sat, 26 Jan 2019 at 19:32, Jonathan Cameron <<a href="mailto:jic23@kernel.org" target="_blank">jic23@kernel.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Sun, 20 Jan 2019 17:05:38 +0200<br>
Tomer Maimon <<a href="mailto:tmaimon77@gmail.com" target="_blank">tmaimon77@gmail.com</a>> wrote:<br>
<br>
> Hi Jonathan,<br>
> <br>
> Thanks a lot for reviewing our driver,<br>
> <br>
> On Sat, 19 Jan 2019 at 20:08, Jonathan Cameron <<a href="mailto:jic23@kernel.org" target="_blank">jic23@kernel.org</a>> wrote:<br>
> <br>
> > On Wed, 16 Jan 2019 18:48:55 +0200<br>
> > Tomer Maimon <<a href="mailto:tmaimon77@gmail.com" target="_blank">tmaimon77@gmail.com</a>> wrote:<br>
> > <br>
> > > Add Nuvoton NPCM BMC Analog-to-Digital Converter(ADC) driver.<br>
> > ><br>
> > > The NPCM ADC is a 10-bit converter for eight channel inputs.<br>
> > ><br>
> > > Signed-off-by: Tomer Maimon <<a href="mailto:tmaimon77@gmail.com" target="_blank">tmaimon77@gmail.com</a>> <br>
> > One trivial ordering in remove oddity that I'll just fix up.<br>
> > Also, I don't particularly like printing a message on success<br>
> > as it's not providing any useful info. Hmm. I don't care<br>
> > strongly enough to remove it though.<br>
> > <br>
> <br>
> The Probe log is is important for us when customers doing bring-up or have<br>
> some issues,<br>
> we ask the logs w/o asking to do all kinds of things to see if a device was<br>
> probed.<br>
<br>
You should probably develop a proper info gathering script. Chances of this<br>
randomly getting 'tidied up' in future (i.e. remove) is rather high and<br>
I doubt I'll remember this if you miss the patch...<br>
<br>
I don't care all that much though and your problem if it goes away. Kernel<br>
logs shouldn't be used as ABI. Even error messages tend to change over time!<br>
<br>
Jonathan<br>
<br>
> <br>
> <br>
> > Applied to the togreg branch of iio.git and pushed out as<br>
> > testing for the autobuilders to play with it.<br>
> ><br>
> > Thanks,<br>
> ><br>
> > Jonathan<br>
> > <br>
> > > ---<br>
> > > drivers/iio/adc/Kconfig | 10 ++<br>
> > > drivers/iio/adc/Makefile | 1 +<br>
> > > drivers/iio/adc/npcm_adc.c | 335 <br>
> > +++++++++++++++++++++++++++++++++++++++++++++ <br>
> > > 3 files changed, 346 insertions(+)<br>
> > > create mode 100644 drivers/iio/adc/npcm_adc.c<br>
> > ><br>
> > > diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig<br>
> > > index 7a3ca4ec0cb7..2d1e70a7d5c4 100644<br>
> > > --- a/drivers/iio/adc/Kconfig<br>
> > > +++ b/drivers/iio/adc/Kconfig<br>
> > > @@ -576,6 +576,16 @@ config NAU7802<br>
> > > To compile this driver as a module, choose M here: the<br>
> > > module will be called nau7802.<br>
> > ><br>
> > > +config NPCM_ADC<br>
> > > + tristate "Nuvoton NPCM ADC driver"<br>
> > > + depends on ARCH_NPCM || COMPILE_TEST<br>
> > > + depends on HAS_IOMEM<br>
> > > + help<br>
> > > + Say yes here to build support for Nuvoton NPCM ADC.<br>
> > > +<br>
> > > + This driver can also be built as a module. If so, the module<br>
> > > + will be called npcm_adc.<br>
> > > +<br>
> > > config PALMAS_GPADC<br>
> > > tristate "TI Palmas General Purpose ADC"<br>
> > > depends on MFD_PALMAS<br>
> > > diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile<br>
> > > index 07df37f621bd..3337eb1f4c30 100644<br>
> > > --- a/drivers/iio/adc/Makefile<br>
> > > +++ b/drivers/iio/adc/Makefile<br>
> > > @@ -55,6 +55,7 @@ obj-$(CONFIG_MEN_Z188_ADC) += men_z188_adc.o<br>
> > > obj-$(CONFIG_MESON_SARADC) += meson_saradc.o<br>
> > > obj-$(CONFIG_MXS_LRADC_ADC) += mxs-lradc-adc.o<br>
> > > obj-$(CONFIG_NAU7802) += nau7802.o<br>
> > > +obj-$(CONFIG_NPCM_ADC) += npcm_adc.o<br>
> > > obj-$(CONFIG_PALMAS_GPADC) += palmas_gpadc.o<br>
> > > obj-$(CONFIG_QCOM_SPMI_ADC5) += qcom-spmi-adc5.o<br>
> > > obj-$(CONFIG_QCOM_SPMI_IADC) += qcom-spmi-iadc.o<br>
> > > diff --git a/drivers/iio/adc/npcm_adc.c b/drivers/iio/adc/npcm_adc.c<br>
> > > new file mode 100644<br>
> > > index 000000000000..1cc377cdf1f7<br>
> > > --- /dev/null<br>
> > > +++ b/drivers/iio/adc/npcm_adc.c<br>
> > > @@ -0,0 +1,335 @@<br>
> > > +// SPDX-License-Identifier: GPL-2.0<br>
> > > +// Copyright (c) 2019 Nuvoton Technology corporation.<br>
> > > +<br>
> > > +#include <linux/clk.h><br>
> > > +#include <linux/device.h><br>
> > > +#include <linux/mfd/syscon.h><br>
> > > +#include <linux/io.h><br>
> > > +#include <linux/iio/iio.h><br>
> > > +#include <linux/interrupt.h><br>
> > > +#include <linux/kernel.h><br>
> > > +#include <linux/module.h><br>
> > > +#include <linux/platform_device.h><br>
> > > +#include <linux/regmap.h><br>
> > > +#include <linux/regulator/consumer.h><br>
> > > +#include <linux/spinlock.h><br>
> > > +#include <linux/uaccess.h><br>
> > > +<br>
> > > +struct npcm_adc {<br>
> > > + bool int_status;<br>
> > > + u32 adc_sample_hz;<br>
> > > + struct device *dev;<br>
> > > + void __iomem *regs;<br>
> > > + struct clk *adc_clk;<br>
> > > + wait_queue_head_t wq;<br>
> > > + struct regulator *vref;<br>
> > > + struct regmap *rst_regmap;<br>
> > > +};<br>
> > > +<br>
> > > +/* NPCM7xx reset module */<br>
> > > +#define NPCM7XX_IPSRST1_OFFSET 0x020<br>
> > > +#define NPCM7XX_IPSRST1_ADC_RST BIT(27)<br>
> > > +<br>
> > > +/* ADC registers */<br>
> > > +#define NPCM_ADCCON 0x00<br>
> > > +#define NPCM_ADCDATA 0x04<br>
> > > +<br>
> > > +/* ADCCON Register Bits */<br>
> > > +#define NPCM_ADCCON_ADC_INT_EN BIT(21)<br>
> > > +#define NPCM_ADCCON_REFSEL BIT(19)<br>
> > > +#define NPCM_ADCCON_ADC_INT_ST BIT(18)<br>
> > > +#define NPCM_ADCCON_ADC_EN BIT(17)<br>
> > > +#define NPCM_ADCCON_ADC_RST BIT(16)<br>
> > > +#define NPCM_ADCCON_ADC_CONV BIT(13)<br>
> > > +<br>
> > > +#define NPCM_ADCCON_CH_MASK GENMASK(27, 24)<br>
> > > +#define NPCM_ADCCON_CH(x) ((x) << 24)<br>
> > > +#define NPCM_ADCCON_DIV_SHIFT 1<br>
> > > +#define NPCM_ADCCON_DIV_MASK GENMASK(8, 1)<br>
> > > +#define NPCM_ADC_DATA_MASK(x) ((x) & GENMASK(9, 0))<br>
> > > +<br>
> > > +#define NPCM_ADC_ENABLE (NPCM_ADCCON_ADC_EN | <br>
> > NPCM_ADCCON_ADC_INT_EN) <br>
> > > +<br>
> > > +/* ADC General Definition */<br>
> > > +#define NPCM_RESOLUTION_BITS 10<br>
> > > +#define NPCM_INT_VREF_MV 2000<br>
> > > +<br>
> > > +#define NPCM_ADC_CHAN(ch) { \<br>
> > > + .type = IIO_VOLTAGE, \<br>
> > > + .indexed = 1, \<br>
> > > + .channel = ch, \<br>
> > > + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \<br>
> > > + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \<br>
> > > + BIT(IIO_CHAN_INFO_SAMP_FREQ), \<br>
> > > +}<br>
> > > +<br>
> > > +static const struct iio_chan_spec npcm_adc_iio_channels[] = {<br>
> > > + NPCM_ADC_CHAN(0),<br>
> > > + NPCM_ADC_CHAN(1),<br>
> > > + NPCM_ADC_CHAN(2),<br>
> > > + NPCM_ADC_CHAN(3),<br>
> > > + NPCM_ADC_CHAN(4),<br>
> > > + NPCM_ADC_CHAN(5),<br>
> > > + NPCM_ADC_CHAN(6),<br>
> > > + NPCM_ADC_CHAN(7),<br>
> > > +};<br>
> > > +<br>
> > > +static irqreturn_t npcm_adc_isr(int irq, void *data)<br>
> > > +{<br>
> > > + u32 regtemp;<br>
> > > + struct iio_dev *indio_dev = data;<br>
> > > + struct npcm_adc *info = iio_priv(indio_dev);<br>
> > > +<br>
> > > + regtemp = ioread32(info->regs + NPCM_ADCCON);<br>
> > > + if (regtemp & NPCM_ADCCON_ADC_INT_ST) {<br>
> > > + iowrite32(regtemp, info->regs + NPCM_ADCCON);<br>
> > > + wake_up_interruptible(&info->wq);<br>
> > > + info->int_status = true;<br>
> > > + }<br>
> > > +<br>
> > > + return IRQ_HANDLED;<br>
> > > +}<br>
> > > +<br>
> > > +static int npcm_adc_read(struct npcm_adc *info, int *val, u8 channel)<br>
> > > +{<br>
> > > + int ret;<br>
> > > + u32 regtemp;<br>
> > > +<br>
> > > + /* Select ADC channel */<br>
> > > + regtemp = ioread32(info->regs + NPCM_ADCCON);<br>
> > > + regtemp &= ~NPCM_ADCCON_CH_MASK;<br>
> > > + info->int_status = false;<br>
> > > + iowrite32(regtemp | NPCM_ADCCON_CH(channel) |<br>
> > > + NPCM_ADCCON_ADC_CONV, info->regs + NPCM_ADCCON);<br>
> > > +<br>
> > > + ret = wait_event_interruptible_timeout(info->wq, info->int_status,<br>
> > > + msecs_to_jiffies(10));<br>
> > > + if (ret == 0) {<br>
> > > + regtemp = ioread32(info->regs + NPCM_ADCCON);<br>
> > > + if ((regtemp & NPCM_ADCCON_ADC_CONV) && info->rst_regmap) {<br>
> > > + /* if conversion failed - reset ADC module */<br>
> > > + regmap_write(info->rst_regmap, <br>
> > NPCM7XX_IPSRST1_OFFSET, <br>
> > > + NPCM7XX_IPSRST1_ADC_RST);<br>
> > > + msleep(100);<br>
> > > + regmap_write(info->rst_regmap, <br>
> > NPCM7XX_IPSRST1_OFFSET, <br>
> > > + 0x0);<br>
> > > + msleep(100);<br>
> > > +<br>
> > > + /* Enable ADC and start conversion module */<br>
> > > + iowrite32(NPCM_ADC_ENABLE | NPCM_ADCCON_ADC_CONV,<br>
> > > + info->regs + NPCM_ADCCON);<br>
> > > + dev_err(info->dev, "RESET ADC Complete\n");<br>
> > > + }<br>
> > > + return -ETIMEDOUT;<br>
> > > + }<br>
> > > + if (ret < 0)<br>
> > > + return ret;<br>
> > > +<br>
> > > + *val = NPCM_ADC_DATA_MASK(ioread32(info->regs + NPCM_ADCDATA));<br>
> > > +<br>
> > > + return 0;<br>
> > > +}<br>
> > > +<br>
> > > +static int npcm_adc_read_raw(struct iio_dev *indio_dev,<br>
> > > + struct iio_chan_spec const *chan, int *val,<br>
> > > + int *val2, long mask)<br>
> > > +{<br>
> > > + int ret;<br>
> > > + int vref_uv;<br>
> > > + struct npcm_adc *info = iio_priv(indio_dev);<br>
> > > +<br>
> > > + switch (mask) {<br>
> > > + case IIO_CHAN_INFO_RAW:<br>
> > > + mutex_lock(&indio_dev->mlock);<br>
> > > + ret = npcm_adc_read(info, val, chan->channel);<br>
> > > + mutex_unlock(&indio_dev->mlock);<br>
> > > + if (ret) {<br>
> > > + dev_err(info->dev, "NPCM ADC read failed\n");<br>
> > > + return ret;<br>
> > > + }<br>
> > > + return IIO_VAL_INT;<br>
> > > + case IIO_CHAN_INFO_SCALE:<br>
> > > + if (info->vref) {<br>
> > > + vref_uv = regulator_get_voltage(info->vref);<br>
> > > + *val = vref_uv / 1000;<br>
> > > + } else {<br>
> > > + *val = NPCM_INT_VREF_MV;<br>
> > > + }<br>
> > > + *val2 = NPCM_RESOLUTION_BITS;<br>
> > > + return IIO_VAL_FRACTIONAL_LOG2;<br>
> > > + case IIO_CHAN_INFO_SAMP_FREQ:<br>
> > > + *val = info->adc_sample_hz;<br>
> > > + return IIO_VAL_INT;<br>
> > > + default:<br>
> > > + return -EINVAL;<br>
> > > + }<br>
> > > +<br>
> > > + return 0;<br>
> > > +}<br>
> > > +<br>
> > > +static const struct iio_info npcm_adc_iio_info = {<br>
> > > + .read_raw = &npcm_adc_read_raw,<br>
> > > +};<br>
> > > +<br>
> > > +static const struct of_device_id npcm_adc_match[] = {<br>
> > > + { .compatible = "nuvoton,npcm750-adc", },<br>
> > > + { /* sentinel */ }<br>
> > > +};<br>
> > > +MODULE_DEVICE_TABLE(of, npcm_adc_match);<br>
> > > +<br>
> > > +static int npcm_adc_probe(struct platform_device *pdev)<br>
> > > +{<br>
> > > + int ret;<br>
> > > + int irq;<br>
> > > + u32 div;<br>
> > > + u32 reg_con;<br>
> > > + struct resource *res;<br>
> > > + struct npcm_adc *info;<br>
> > > + struct iio_dev *indio_dev;<br>
> > > + struct device *dev = &pdev->dev;<br>
> > > + struct device_node *np = pdev->dev.of_node;<br>
> > > +<br>
> > > + indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));<br>
> > > + if (!indio_dev)<br>
> > > + return -ENOMEM;<br>
> > > + info = iio_priv(indio_dev);<br>
> > > +<br>
> > > + info->dev = &pdev->dev;<br>
> > > +<br>
> > > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);<br>
> > > + info->regs = devm_ioremap_resource(&pdev->dev, res);<br>
> > > + if (IS_ERR(info->regs))<br>
> > > + return PTR_ERR(info->regs);<br>
> > > +<br>
> > > + info->adc_clk = devm_clk_get(&pdev->dev, NULL);<br>
> > > + if (IS_ERR(info->adc_clk)) {<br>
> > > + dev_warn(&pdev->dev, "ADC clock failed: can't read clk\n");<br>
> > > + return PTR_ERR(info->adc_clk);<br>
> > > + }<br>
> > > +<br>
> > > + /* calculate ADC clock sample rate */<br>
> > > + reg_con = ioread32(info->regs + NPCM_ADCCON);<br>
> > > + div = reg_con & NPCM_ADCCON_DIV_MASK;<br>
> > > + div = div >> NPCM_ADCCON_DIV_SHIFT;<br>
> > > + info->adc_sample_hz = clk_get_rate(info->adc_clk) / ((div + 1) * <br>
> > 2); <br>
> > > +<br>
> > > + if (of_device_is_compatible(np, "nuvoton,npcm750-adc")) {<br>
> > > + info->rst_regmap = syscon_regmap_lookup_by_compatible<br>
> > > + ("nuvoton,npcm750-rst");<br>
> > > + if (IS_ERR(info->rst_regmap)) {<br>
> > > + dev_err(&pdev->dev, "Failed to find <br>
> > nuvoton,npcm750-rst\n"); <br>
> > > + ret = PTR_ERR(info->rst_regmap);<br>
> > > + goto err_disable_clk;<br>
> > > + }<br>
> > > + }<br>
> > > +<br>
> > > + irq = platform_get_irq(pdev, 0);<br>
> > > + if (irq <= 0) {<br>
> > > + dev_err(dev, "failed getting interrupt resource\n");<br>
> > > + ret = -EINVAL;<br>
> > > + goto err_disable_clk;<br>
> > > + }<br>
> > > +<br>
> > > + ret = devm_request_irq(&pdev->dev, irq, npcm_adc_isr, 0,<br>
> > > + "NPCM_ADC", indio_dev);<br>
> > > + if (ret < 0) {<br>
> > > + dev_err(dev, "failed requesting interrupt\n");<br>
> > > + goto err_disable_clk;<br>
> > > + }<br>
> > > +<br>
> > > + reg_con = ioread32(info->regs + NPCM_ADCCON);<br>
> > > + info->vref = devm_regulator_get_optional(&pdev->dev, "vref");<br>
> > > + if (!IS_ERR(info->vref)) {<br>
> > > + ret = regulator_enable(info->vref);<br>
> > > + if (ret) {<br>
> > > + dev_err(&pdev->dev, "Can't enable ADC reference <br>
> > voltage\n"); <br>
> > > + goto err_disable_clk;<br>
> > > + }<br>
> > > +<br>
> > > + iowrite32(reg_con & ~NPCM_ADCCON_REFSEL,<br>
> > > + info->regs + NPCM_ADCCON);<br>
> > > + } else {<br>
> > > + /*<br>
> > > + * Any error which is not ENODEV indicates the regulator<br>
> > > + * has been specified and so is a failure case.<br>
> > > + */<br>
> > > + if (PTR_ERR(info->vref) != -ENODEV) {<br>
> > > + ret = PTR_ERR(info->vref);<br>
> > > + goto err_disable_clk;<br>
> > > + }<br>
> > > +<br>
> > > + /* Use internal reference */<br>
> > > + iowrite32(reg_con | NPCM_ADCCON_REFSEL,<br>
> > > + info->regs + NPCM_ADCCON);<br>
> > > + }<br>
> > > +<br>
> > > + init_waitqueue_head(&info->wq);<br>
> > > +<br>
> > > + reg_con = ioread32(info->regs + NPCM_ADCCON);<br>
> > > + reg_con |= NPCM_ADC_ENABLE;<br>
> > > +<br>
> > > + /* Enable the ADC Module */<br>
> > > + iowrite32(reg_con, info->regs + NPCM_ADCCON);<br>
> > > +<br>
> > > + /* Start ADC conversion */<br>
> > > + iowrite32(reg_con | NPCM_ADCCON_ADC_CONV, info->regs + <br>
> > NPCM_ADCCON); <br>
> > > +<br>
> > > + platform_set_drvdata(pdev, indio_dev);<br>
> > > + indio_dev->name = dev_name(&pdev->dev);<br>
> > > + indio_dev->dev.parent = &pdev->dev;<br>
> > > + indio_dev->info = &npcm_adc_iio_info;<br>
> > > + indio_dev->modes = INDIO_DIRECT_MODE;<br>
> > > + indio_dev->channels = npcm_adc_iio_channels;<br>
> > > + indio_dev->num_channels = ARRAY_SIZE(npcm_adc_iio_channels);<br>
> > > +<br>
> > > + ret = iio_device_register(indio_dev);<br>
> > > + if (ret) {<br>
> > > + dev_err(&pdev->dev, "Couldn't register the device.\n");<br>
> > > + goto err_iio_register;<br>
> > > + }<br>
> > > +<br>
> > > + pr_info("NPCM ADC driver probed\n"); <br>
> > Hmm. Not sure this tells us anything useful. If we have succeeding<br>
> > in probing there are lots of ways to find out that are better than<br>
> > filling up the kernel log.<br>
> > <br>
> > > +<br>
> > > + return 0;<br>
> > > +<br>
> > > +err_iio_register:<br>
> > > + iowrite32(reg_con & ~NPCM_ADCCON_ADC_EN, info->regs + NPCM_ADCCON);<br>
> > > + if (!IS_ERR(info->vref))<br>
> > > + regulator_disable(info->vref);<br>
> > > +err_disable_clk:<br>
> > > + clk_disable_unprepare(info->adc_clk);<br>
> > > +<br>
> > > + return ret;<br>
> > > +}<br>
> > > +<br>
> > > +static int npcm_adc_remove(struct platform_device *pdev)<br>
> > > +{<br>
> > > + struct iio_dev *indio_dev = platform_get_drvdata(pdev);<br>
> > > + struct npcm_adc *info = iio_priv(indio_dev);<br>
> > > + u32 regtemp;<br>
> > > +<br>
> > > + regtemp = ioread32(info->regs + NPCM_ADCCON); <br>
> ><br>
> > The ordering is a bit odd here. I would have done the unregister<br>
> > first then read the value. Doesn't have any real effect other than making<br>
> > reviewers wonder if there is something interesting going on!<br>
> > <br>
> > > +<br>
> > > + iio_device_unregister(indio_dev);<br>
> > > + iowrite32(regtemp & ~NPCM_ADCCON_ADC_EN, info->regs + NPCM_ADCCON);<br>
> > > + if (!IS_ERR(info->vref))<br>
> > > + regulator_disable(info->vref);<br>
> > > + clk_disable_unprepare(info->adc_clk);<br>
> > > +<br>
> > > + return 0;<br>
> > > +}<br>
> > > +<br>
> > > +static struct platform_driver npcm_adc_driver = {<br>
> > > + .probe = npcm_adc_probe,<br>
> > > + .remove = npcm_adc_remove,<br>
> > > + .driver = {<br>
> > > + .name = "npcm_adc",<br>
> > > + .of_match_table = npcm_adc_match,<br>
> > > + },<br>
> > > +};<br>
> > > +<br>
> > > +module_platform_driver(npcm_adc_driver);<br>
> > > +<br>
> > > +MODULE_DESCRIPTION("Nuvoton NPCM ADC Driver");<br>
> > > +MODULE_AUTHOR("Tomer Maimon <<a href="mailto:tomer.maimon@nuvoton.com" target="_blank">tomer.maimon@nuvoton.com</a>>");<br>
> > > +MODULE_LICENSE("GPL v2"); <br>
> ><br>
> > <br>
> Thanks,<br>
> <br>
> Tomer<br>
<br>
</blockquote></div>