<html><head></head><body><div style="font-family:courier new, courier, monaco, monospace, sans-serif;font-size:16px;"><div>Hi, </div><div><br></div><div> I am having trouble with invoking fiq handler on my FPGA watchdog timing out. <span><span style="color: rgb(0, 0, 0); font-family: "courier new", courier, monaco, monospace, sans-serif; font-size: 16px;">I have already done the aspeed register initializations in u-boot and verified fiq is generated with a hardware probe. </span></span></div><div><br></div><div>Is there any sample code for setting up the fiq handler for aspeed 2500 g5 SOC? Any pointers would be helpful.</div><div><br></div><div>Thanks,</div><div>Subha.</div><div style="font-family:courier new, courier, monaco, monospace, sans-serif;font-size:16px;"></div></div></body></html>