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<p class="MsoNormal"><span lang="EN-US" style="mso-fareast-language:EN-US">Hi </span>
<span lang="EN-US"> Henbin.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">></span><span lang="EN-US"> May I know how do you verify the JTAG driver workable?<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">I have ultility which progrm CPLD with using this JTAG driver.<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">You can see it on github:<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">https://github.com/sholeksandr/mellanox-bmc-tools/tree/jtag_class_drv/mlnx_cpldprog<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">Best Regards,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US">Oleksandr Shamray<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="mso-fareast-language:EN-US"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span lang="EN-US">From:</span></b><span lang="EN-US"> Henbin Chang [mailto:henbinchang@gmail.com]
<br>
<b>Sent:</b> 17 июля 2018 г. 5:55<br>
<b>To:</b> OpenBMC Maillist <openbmc@lists.ozlabs.org>; Oleksandr Shamray <oleksandrs@mellanox.com><br>
<b>Subject:</b> Re: [patch v27 0/4] JTAG driver introduction<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Hi Oleksandr,<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Sorry to bother you.<o:p></o:p></p>
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<p class="MsoNormal">May I know how do you verify the JTAG driver workable?<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Thanks.<o:p></o:p></p>
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<p class="MsoNormal">BRs,<o:p></o:p></p>
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<p class="MsoNormal">Henbin<o:p></o:p></p>
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<p class="MsoNormal"> <o:p></o:p></p>
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<p class="MsoNormal">When a need raise up to use JTAG interface for system's devices<br>
programming or CPU debugging, usually the user layer<br>
application implements jtag protocol by bit-bang or using a <br>
proprietary connection to vendor hardware.<br>
This method can be slow and not generic.<br>
<br>
We propose to implement general JTAG interface and infrastructure<br>
to communicate with user layer application. In such way, we can<br>
have the standard JTAG interface core part and separation from<br>
specific HW implementation.<br>
This allow new capability to debug the CPU or program system's <br>
device via BMC without additional devices nor cost. This patch purpose is to add JTAG master core infrastructure by
<br>
defining new JTAG class and provide generic JTAG interface<br>
to allow hardware specific drivers to connect this interface.<br>
This will enable all JTAG drivers to use the common interface<br>
part and will have separate for hardware implementation. The JTAG (Joint Test Action Group) core driver provides minimal generic<br>
JTAG interface, which can be used by hardware specific JTAG master<br>
controllers. By providing common interface for the JTAG controllers,<br>
user space device programing is hardware independent.<br>
<br>
Modern SoC which in use for embedded system' equipped with<br>
internal JTAG master interface.<br>
This interface is used for programming and debugging system's<br>
hardware components, like CPLD, FPGA, CPU, voltage and<br>
industrial controllers.<br>
Firmware for such devices can be upgraded through JTAG interface during<br>
Runtime. The JTAG standard support for multiple devices programming,<br>
is in case their lines are daisy-chained together. For example, systems which equipped with host CPU, BMC SoC or/and
<br>
number of programmable devices are capable to connect a pin and<br>
select system components dynamically for programming and debugging,<br>
This is using by the BMC which is equipped with internal SoC master<br>
controller.<br>
For example: BMC JTAG master --> pin selected to CPLDs chain for programming (filed<br>
upgrade, production) <br>
BMC JTAG master --> pin selected to voltage monitors for programming <br>
(field upgrade, production) <br>
BMC JTAG master --> pin selected to host CPU (on-site debugging <br>
and developers debugging) For example, we can have application in user space which using calls<br>
to JTAG driver executes CPLD programming directly from SVF file<br>
<br>
The JTAG standard (IEEE 1149.1) defines the next connector pins:<br>
- TDI (Test Data In);<br>
- TDO (Test Data Out);<br>
- TCK (Test Clock);<br>
- TMS (Test Mode Select);<br>
- TRST (Test Reset) (Optional); The SoC equipped with JTAG master controller, performs<br>
device programming on command or vector level. For example<br>
a file in a standard SVF (Serial Vector Format) that contains<br>
boundary scan vectors, can be used by sending each vector<br>
to the JTAG interface and the JTAG controller will execute<br>
the programming. Initial version provides the system calls set for:<br>
- SIR (Scan Instruction Register, IEEE 1149.1 Instruction Register scan);<br>
- SDR (Scan Data Register, IEEE 1149.1 Data Register scan);<br>
- RUNTEST (Forces the IEEE 1149.1 bus to a run state for a specified<br>
number of clocks. SoC which are not equipped with JTAG master interface, can be built<br>
on top of JTAG core driver infrastructure, by applying bit-banging of<br>
TDI, TDO, TCK and TMS pins within the hardware specific driver. Oleksandr Shamray (4):<br>
drivers: jtag: Add JTAG core driver<br>
drivers: jtag: Add Aspeed SoC 24xx and 25xx families JTAG master<br>
driver<br>
Documentation: jtag: Add bindings for Aspeed SoC 24xx and 25xx<br>
families JTAG master driver<br>
Documentation: jtag: Add ABI documentation Documentation/ABI/testing/jtag-dev | 23 +<br>
.../devicetree/bindings/jtag/aspeed-jtag.txt | 22 +<br>
Documentation/ioctl/ioctl-number.txt | 2 +<br>
Documentation/jtag/overview | 27 +<br>
Documentation/jtag/transactions | 109 +++<br>
MAINTAINERS | 10 +<br>
drivers/Kconfig | 2 +<br>
drivers/Makefile | 1 +<br>
drivers/jtag/Kconfig | 31 +<br>
drivers/jtag/Makefile | 2 +<br>
drivers/jtag/jtag-aspeed.c | 747 ++++++++++++++++++++<br>
drivers/jtag/jtag.c | 274 +++++++<br>
include/linux/jtag.h | 41 ++<br>
include/uapi/linux/jtag.h | 109 +++<br>
14 files changed, 1400 insertions(+), 0 deletions(-)<br>
create mode 100644 Documentation/ABI/testing/jtag-dev<br>
create mode 100644 Documentation/devicetree/bindings/jtag/aspeed-jtag.txt<br>
create mode 100644 Documentation/jtag/overview<br>
create mode 100644 Documentation/jtag/transactions<br>
create mode 100644 drivers/jtag/Kconfig<br>
create mode 100644 drivers/jtag/Makefile<br>
create mode 100644 drivers/jtag/jtag-aspeed.c<br>
create mode 100644 drivers/jtag/jtag.c<br>
create mode 100644 include/linux/jtag.h<br>
create mode 100644 include/uapi/linux/jtag.h<o:p></o:p></p>
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