<div dir="ltr">

<span class="gmail-im" style="color:rgb(80,0,80);font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><span style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline">What kernel tree are you building/booting? Can you provide a link?</span><br style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><span style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline">Currently we've tied the LCLK to enabling LPC2AHB bridge:</span><br style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><a href="https://github.com/openbmc/linux/blob/dev-4.13/arch/arm/boot/dts/aspeed-g5.dtsi#L302" rel="noreferrer" target="_blank" style="color:rgb(17,85,204);font-size:14px">https://github.com/openbmc/lin<wbr>ux/blob/dev-4.13/arch/arm/boot<wbr>/dts/aspeed-g5.dtsi#L302</a><br style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><span style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline">You may need to add the following to your dts if you've developed your own:</span><br style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><span style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline">```<br></span><span style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline">&lpc_ctrl {<br></span><span style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline">        status = "okay";<br></span><span style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline">};</span></blockquote><div><br></div></span><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial">Hi Andrew,</div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><br></div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial">Thanks  for your quick response.</div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><br></div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial">I use dev-4.13 branch (the last commit is aca92be80c008bceeb6fb62fd1d450<wbr>b5be5d0a4f).</div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><br></div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial">The aspeed-g5.dtsi I use is the same with the one in your link.</div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><br></div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial">I follow your suggestion and add the following to my dts but the SCU0C[8] is still 1b'.</div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><br></div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><span style="background-color:rgb(255,255,255);text-decoration-style:initial;text-decoration-color:initial;font-size:14px;float:none;display:inline">&lpc_ctrl {<br></span><span style="background-color:rgb(255,255,255);text-decoration-style:initial;text-decoration-color:initial;font-size:14px;float:none;display:inline">        status = "okay";<br></span><span style="background-color:rgb(255,255,255);text-decoration-style:initial;text-decoration-color:initial;font-size:14px;float:none;display:inline">};</span><span> </span><br></div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><br></div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial">Even I directly change the status of lpc_ctrl to 'okay'  in the <span style="font-size:small;background-color:rgb(255,255,255);text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline">aspeed-g5.dtsi, <span> </span><span style="text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline">the SCU0C[8] is still 1b'.</span></span></div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><span style="background-color:rgb(255,255,255);text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline"><span style="text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline"><div>lpc_ctrl: lpc-ctrl@0 {</div><div>     compatible = "aspeed,ast2500-lpc-ctrl";</div><div>     reg = <0x0 0x80>;</div><div>     clocks = <&syscon ASPEED_CLK_GATE_LCLK>;</div><div>     status = "okay";</div><div> };</div><div><br></div></span></span></div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><span style="background-color:rgb(255,255,255);text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline"><span style="text-decoration-style:initial;text-decoration-color:initial;float:none;display:inline"><div>devmem 0x1e6e200c 32</div><div>0xFFCDBF8B</div></span></span></div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial"><br></div><div style="font-size:14px;text-decoration-style:initial;text-decoration-color:initial">Thanks.</div>

<br></div><div class="gmail_extra"><br><div class="gmail_quote">2018-06-06 10:36 GMT+08:00 Andrew Jeffery <span dir="ltr"><<a href="mailto:andrew@aj.id.au" target="_blank">andrew@aj.id.au</a>></span>:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi Henbin,<br>
<span class=""><br>
On Wed, 6 Jun 2018, at 11:30, Henbin Chang wrote:<br>
> Hi,<br>
> <br>
> I found 'SCU0C[8] Stop LCLK' was set after boot into Kernel.<br>
> <br>
> Could anyone share how/where I should configure the Clock Stop Control<br>
> Register?<br>
<br>
</span>What kernel tree are you building/booting? Can you provide a link?<br>
<br>
Currently we've tied the LCLK to enabling LPC2AHB bridge:<br>
<br>
<a href="https://github.com/openbmc/linux/blob/dev-4.13/arch/arm/boot/dts/aspeed-g5.dtsi#L302" rel="noreferrer" target="_blank">https://github.com/openbmc/<wbr>linux/blob/dev-4.13/arch/arm/<wbr>boot/dts/aspeed-g5.dtsi#L302</a><br>
<br>
You may need to add the following to your dts if you've developed your own:<br>
<br>
```<br>
&lpc_ctrl {<br>
        status = "okay";<br>
};<br>
```<br>
<span class="HOEnZb"><font color="#888888"><br>
Andrew<br>
</font></span></blockquote></div><br></div>