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<p><font face="sans-serif" size="2">Tested-by: Matt Spinler <a class="moz-txt-link-abbreviated" href="mailto:mspinler@linux.vnet.ibm.com">mspinler@linux.vnet.ibm.com</a></font></p>
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<div class="moz-cite-prefix">On 7/27/2017 5:16 AM, Andrew Jeffery
wrote:<br>
</div>
<blockquote cite="mid:20170727101647.26960-2-andrew@aj.id.au"
type="cite">
<pre wrap="">On Witherspoon, the Aspeed SoC's WDTRST1 pin is wired to the FAULT pin
on the MAX31785 fan controller, which drives the fans to 100% PWM duty
when asserted. The pulse generated by the watchdog is latched to ensure
the fans stay at full speed across the BMC reboot. The latch is reset
when the BMC transitions through the chassis-poweron systemd target.
The SoC's WDTRST1 pinctrl function needs to be requested for
aspeed,external-signal to be effective, otherwise the pin is not
associated with the watchdog controller.
Signed-off-by: Andrew Jeffery <a class="moz-txt-link-rfc2396E" href="mailto:andrew@aj.id.au"><andrew@aj.id.au></a>
Cc: Matt Spinler <a class="moz-txt-link-rfc2396E" href="mailto:mspinler@linux.vnet.ibm.com"><mspinler@linux.vnet.ibm.com></a>
---
arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
index d9649013ee78..c28222c17d03 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
@@ -488,6 +488,9 @@
&wdt1 {
aspeed,reset-type = "none";
aspeed,external-signal;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdtrst1_default>;
};
&wdt2 {
</pre>
</blockquote>
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