<div dir="ltr">I still don't follow. Is this changing it to drop bytes until the host powers on? Is this change making it so the device won't open?</div><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Jan 27, 2017 at 3:23 PM, Xo Wang <span dir="ltr"><<a href="mailto:xow@google.com" target="_blank">xow@google.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Currently, UART1 on Zaius BMC is unusable until brought out of reset by<br>
powering the host on. In this reset state, ttyS0 can still be opened<br>
and UART1 silently drops bytes, which is not obviously expected<br>
behavior.<br>
<br>
Clear the LPC block control bit that enables LPCRST# as a reset source<br>
for UART1.<br>
<br>
Signed-off-by: Xo Wang <<a href="mailto:xow@google.com">xow@google.com</a><br>
---<br>
arch/arm/mach-aspeed/aspeed.c | 7 +++++++<br>
1 file changed, 7 insertions(+)<br>
<br>
diff --git a/arch/arm/mach-aspeed/aspeed.<wbr>c b/arch/arm/mach-aspeed/aspeed.<wbr>c<br>
index 4bd3680d742d..fa99d8bde5e0 100644<br>
--- a/arch/arm/mach-aspeed/aspeed.<wbr>c<br>
+++ b/arch/arm/mach-aspeed/aspeed.<wbr>c<br>
@@ -185,6 +185,13 @@ static void __init do_zaius_setup(void)<br>
<br>
/* Set SPI1 CE0 decoding window to 0x30000000 */<br>
writel(0x68600000, AST_IO(AST_BASE_SPI | 0x30));<br>
+<br>
+ /* Disable LPC reset for UART1, otherwise held in reset by LPCRST#,<br>
+ * silently dropping bytes until released (usually by host power on)<br>
+ * */<br>
+ reg = readl(AST_IO(AST_BASE_LPC | 0x98));<br>
+ /* Clear "Enable UART1 reset source from LPC" */<br>
+ writel(reg & ~BIT(4), AST_IO(AST_BASE_LPC | 0x98));<br>
}<br>
<br>
static void __init do_witherspoon_setup(void)<br>
<span class="HOEnZb"><font color="#888888">--<br>
2.11.0.483.g087da7b7c-goog<br>
<br>
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</font></span></blockquote></div><br></div>