<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Wed, Sep 28, 2016 at 6:29 PM, Joel Stanley <span dir="ltr"><<a href="mailto:joel@jms.id.au" target="_blank">joel@jms.id.au</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><span class="">On Wed, Sep 28, 2016 at 3:13 AM, <<a href="mailto:maxims@google.com">maxims@google.com</a>> wrote:<br>
> From: Maxim Sloyko <<a href="mailto:maxims@google.com">maxims@google.com</a>><br>
><br>
> Fixed the bug in board initialization, which caused<br>
> failures during boot with device tree.<br>
> The flags are used to modify malloc behaviour after relocation,<br>
> resetting the flag caused it to fail.<br>
<br>
</span>This unrelated to the device tree additions and therefore should be in<br>
a separate patch.<br></blockquote><div><br></div><div>This is related, because the device tree can't be used without this fix.</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
The device tree additions look okay.<br>
<div><div class="h5"><br>
> ---<br>
> arch/arm/dts/Makefile | 2 +<br>
> arch/arm/dts/aspeed-g5-evb.dts | 28 +++<br>
> arch/arm/dts/aspeed-g5.dtsi | 541 ++++++++++++++++++++++++++++++<wbr>+++++++++++<br>
> board/aspeed/ast-g5/ast-g5.c | 1 -<br>
> 4 files changed, 571 insertions(+), 1 deletion(-)<br>
> create mode 100644 arch/arm/dts/aspeed-g5-evb.dts<br>
> create mode 100644 arch/arm/dts/aspeed-g5.dtsi<br>
><br>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile<br>
> index d1f8e22..09efa0a 100644<br>
> --- a/arch/arm/dts/Makefile<br>
> +++ b/arch/arm/dts/Makefile<br>
> @@ -233,6 +233,8 @@ dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \<br>
> k2e-evm.dtb \<br>
> k2g-evm.dtb<br>
><br>
> +dtb-$(CONFIG_TARGET_AST_G5) += aspeed-g5-evb.dtb<br>
> +<br>
> targets += $(dtb-y)<br>
><br>
> # Add any required device tree compiler flags here<br>
> diff --git a/arch/arm/dts/aspeed-g5-evb.<wbr>dts b/arch/arm/dts/aspeed-g5-evb.<wbr>dts<br>
> new file mode 100644<br>
> index 0000000..95dc77a<br>
> --- /dev/null<br>
> +++ b/arch/arm/dts/aspeed-g5-evb.<wbr>dts<br>
> @@ -0,0 +1,28 @@<br>
> +/dts-v1/;<br>
> +<br>
> +#include "aspeed-g5.dtsi"<br>
> +<br>
> +/ {<br>
> + memory {<br>
> + device_type = "memory";<br>
> + reg = <0x80000000 0x20000000>;<br>
> + };<br>
> +<br>
> + aliases {<br>
> + i2c1 = &i2c0;<br>
> + i2c4 = &i2c3;<br>
> + i2c8 = &i2c7;<br>
> + };<br>
> +};<br>
> +<br>
> +&i2c0 {<br>
> + status = "okay";<br>
> +};<br>
> +<br>
> +&i2c3 {<br>
> + status = "okay";<br>
> +};<br>
> +<br>
> +&i2c7 {<br>
> + status = "okay";<br>
> +};<br>
> diff --git a/arch/arm/dts/aspeed-g5.dtsi b/arch/arm/dts/aspeed-g5.dtsi<br>
> new file mode 100644<br>
> index 0000000..eb81a2e<br>
> --- /dev/null<br>
> +++ b/arch/arm/dts/aspeed-g5.dtsi<br>
> @@ -0,0 +1,541 @@<br>
> +/* The device tree is copied from<br>
> + * <a href="https://github.com/openbmc/linux/blob/9ec9d09/arch/arm/boot/dts/aspeed-g5.dtsi" rel="noreferrer" target="_blank">https://github.com/openbmc/<wbr>linux/blob/9ec9d09/arch/arm/<wbr>boot/dts/aspeed-g5.dtsi</a><br>
> + */<br>
> +#include "skeleton.dtsi"<br>
> +<br>
> +/ {<br>
> + model = "Aspeed BMC";<br>
> + compatible = "aspeed,ast2500";<br>
> + #address-cells = <1>;<br>
> + #size-cells = <1>;<br>
> + interrupt-parent = <&vic>;<br>
> +<br>
> + cpus {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> +<br>
> + cpu@0 {<br>
> + compatible = "arm,arm1176jzf-s";<br>
> + device_type = "cpu";<br>
> + reg = <0>;<br>
> + };<br>
> + };<br>
> +<br>
> + ahb {<br>
> + compatible = "simple-bus";<br>
> + #address-cells = <1>;<br>
> + #size-cells = <1>;<br>
> + ranges;<br>
> +<br>
> + vic: interrupt-controller@1e6c0080 {<br>
> + compatible = "aspeed,ast2400-vic";<br>
> + interrupt-controller;<br>
> + #interrupt-cells = <1>;<br>
> + valid-sources = <0xfefff7ff 0x0807ffff>;<br>
> + reg = <0x1e6c0080 0x80>;<br>
> + };<br>
> +<br>
> + mac0: ethernet@1e660000 {<br>
> + compatible = "faraday,ftgmac100";<br>
> + reg = <0x1e660000 0x180>;<br>
> + interrupts = <2>;<br>
> + no-hw-checksum;<br>
> + status = "disabled";<br>
> + };<br>
> +<br>
> + mac1: ethernet@1e680000 {<br>
> + compatible = "faraday,ftgmac100";<br>
> + reg = <0x1e680000 0x180>;<br>
> + interrupts = <3>;<br>
> + no-hw-checksum;<br>
> + status = "disabled";<br>
> + };<br>
> +<br>
> + apb {<br>
> + compatible = "simple-bus";<br>
> + #address-cells = <1>;<br>
> + #size-cells = <1>;<br>
> + ranges;<br>
> +<br>
> + clk_clkin: clk_clkin@1e6e2070 {<br>
> + #clock-cells = <0>;<br>
> + compatible = "aspeed,g5-clkin-clock";<br>
> + reg = <0x1e6e2070 0x04>;<br>
> + };<br>
> +<br>
> + syscon: syscon@1e6e2000 {<br>
> + compatible = "aspeed,g5-scu", "syscon", "simple-mfd";<br>
> + reg = <0x1e6e2000 0x1a8>;<br>
> +<br>
> + pinctrl: pinctrl@1e6e2000 {<br>
> + compatible = "aspeed,g5-pinctrl";<br>
> +<br>
> + pinctrl_i2c9_default: i2c9_default {<br>
> + function = "I2C9";<br>
> + groups = "I2C9";<br>
> + };<br>
> +<br>
> + pinctrl_i2c10_default: i2c10_default {<br>
> + function = "I2C10";<br>
> + groups = "I2C10";<br>
> + };<br>
> +<br>
> + pinctrl_i2c11_default: i2c11_default {<br>
> + function = "I2C11";<br>
> + groups = "I2C11";<br>
> + };<br>
> +<br>
> + pinctrl_i2c12_default: i2c12_default {<br>
> + function = "I2C12";<br>
> + groups = "I2C12";<br>
> + };<br>
> +<br>
> + pinctrl_i2c13_default: i2c13_default {<br>
> + function = "I2C13";<br>
> + groups = "I2C13";<br>
> + };<br>
> +<br>
> + pinctrl_gpid0_default: gpid0_default {<br>
> + function = "GPID0";<br>
> + groups = "GPID0";<br>
> + };<br>
> +<br>
> + pinctrl_gpid1_default: gpid1_default {<br>
> + function = "GPID1";<br>
> + groups = "GPID1";<br>
> + };<br>
> +<br>
> + pinctrl_sd1_default: sd1_default {<br>
> + function = "SD1";<br>
> + groups = "SD1";<br>
> + };<br>
> +<br>
> + pinctrl_i2c5_default: i2c5_default {<br>
> + function = "I2C5";<br>
> + groups = "I2C5";<br>
> + };<br>
> +<br>
> + pinctrl_i2c6_default: i2c6_default {<br>
> + function = "I2C6";<br>
> + groups = "I2C6";<br>
> + };<br>
> +<br>
> + pinctrl_i2c7_default: i2c7_default {<br>
> + function = "I2C7";<br>
> + groups = "I2C7";<br>
> + };<br>
> +<br>
> + pinctrl_i2c8_default: i2c8_default {<br>
> + function = "I2C8";<br>
> + groups = "I2C8";<br>
> + };<br>
> +<br>
> + pinctrl_pwm0_default: pwm0_default {<br>
> + function = "PWM0";<br>
> + groups = "PWM0";<br>
> + };<br>
> +<br>
> + pinctrl_pwm1_default: pwm1_default {<br>
> + function = "PWM1";<br>
> + groups = "PWM1";<br>
> + };<br>
> +<br>
> + pinctrl_pwm2_default: pwm2_default {<br>
> + function = "PWM2";<br>
> + groups = "PWM2";<br>
> + };<br>
> +<br>
> + pinctrl_pwm3_default: pwm3_default {<br>
> + function = "PWM3";<br>
> + groups = "PWM3";<br>
> + };<br>
> +<br>
> + pinctrl_pwm4_default: pwm4_default {<br>
> + function = "PWM4";<br>
> + groups = "PWM4";<br>
> + };<br>
> +<br>
> + pinctrl_pwm5_default: pwm5_default {<br>
> + function = "PWM5";<br>
> + groups = "PWM5";<br>
> + };<br>
> +<br>
> + pinctrl_pwm6_default: pwm6_default {<br>
> + function = "PWM6";<br>
> + groups = "PWM6";<br>
> + };<br>
> +<br>
> + pinctrl_pwm7_default: pwm7_default {<br>
> + function = "PWM7";<br>
> + groups = "PWM7";<br>
> + };<br>
> +<br>
> + pinctrl_i2c3_default: i2c3_default {<br>
> + function = "I2C3";<br>
> + groups = "I2C3";<br>
> + };<br>
> +<br>
> + pinctrl_i2c4_default: i2c4_default {<br>
> + function = "I2C4";<br>
> + groups = "I2C4";<br>
> + };<br>
> +<br>
> + pinctrl_i2c14_default: i2c14_default {<br>
> + function = "I2C14";<br>
> + groups = "I2C14";<br>
> + };<br>
> +<br>
> + pinctrl_rgmii1_default: rgmii1_default {<br>
> + function = "RGMII1";<br>
> + groups = "RGMII1";<br>
> + };<br>
> +<br>
> + pinctrl_rmii1_default: rmii1_default {<br>
> + function = "RMII1";<br>
> + groups = "RMII1";<br>
> + };<br>
> +<br>
> + pinctrl_rgmii2_default: rgmii2_default {<br>
> + function = "RGMII2";<br>
> + groups = "RGMII2";<br>
> + };<br>
> +<br>
> + pinctrl_rmii2_default: rmii2_default {<br>
> + function = "RMII2";<br>
> + groups = "RMII2";<br>
> + };<br>
> + };<br>
> + };<br>
> +<br>
> + clk_hpll: clk_hpll@1e6e2024 {<br>
> + #clock-cells = <0>;<br>
> + compatible = "aspeed,g5-hpll-clock";<br>
> + reg = <0x1e6e2024 0x4>;<br>
> + clocks = <&clk_clkin>;<br>
> + };<br>
> +<br>
> + clk_ahb: clk_ahb@1e6e2070 {<br>
> + #clock-cells = <0>;<br>
> + compatible = "aspeed,g5-ahb-clock";<br>
> + reg = <0x1e6e2070 0x4>;<br>
> + clocks = <&clk_hpll>;<br>
> + };<br>
> +<br>
> + clk_apb: clk_apb@1e6e2008 {<br>
> + #clock-cells = <0>;<br>
> + compatible = "aspeed,g5-apb-clock";<br>
> + reg = <0x1e6e2008 0x4>;<br>
> + clocks = <&clk_hpll>;<br>
> + };<br>
> +<br>
> + clk_uart: clk_uart@1e6e2008 {<br>
> + #clock-cells = <0>;<br>
> + compatible = "aspeed,uart-clock";<br>
> + reg = <0x1e6e202c 0x4>;<br>
> + };<br>
> +<br>
> + sram@1e720000 {<br>
> + compatible = "mmio-sram";<br>
> + reg = <0x1e720000 0x9000>; // 36K<br>
> + };<br>
> +<br>
> + gpio: gpio@1e780000 {<br>
> + #gpio-cells = <2>;<br>
> + gpio-controller;<br>
> + compatible = "aspeed,ast2500-gpio";<br>
> + reg = <0x1e780000 0x1000>;<br>
> + interrupts = <20>;<br>
> + gpio-ranges = <&pinctrl 0 0 220>;<br>
> + };<br>
> +<br>
> + timer: timer@1e782000 {<br>
> + compatible = "aspeed,ast2400-timer";<br>
> + reg = <0x1e782000 0x90>;<br>
> + // The moxart_timer driver registers only one<br>
> + // interrupt and assumes it's for timer 1<br>
> + //interrupts = <16 17 18 35 36 37 38 39>;<br>
> + interrupts = <16>;<br>
> + clocks = <&clk_apb>;<br>
> + };<br>
> +<br>
> + ibt: ibt@1e789140 {<br>
> + compatible = "aspeed,bt-host";<br>
> + reg = <0x1e789140 0x18>;<br>
> + interrupts = <8>;<br>
> + };<br>
> +<br>
> + wdt1: wdt@1e785000 {<br>
> + compatible = "aspeed,ast2500-wdt";<br>
> + reg = <0x1e785000 0x1c>;<br>
> + };<br>
> +<br>
> + wdt2: wdt@1e785020 {<br>
> + compatible = "aspeed,ast2500-wdt";<br>
> + reg = <0x1e785020 0x1c>;<br>
> + status = "disabled";<br>
> + };<br>
> +<br>
> + wdt3: wdt@1e785040 {<br>
> + compatible = "aspeed,wdt";<br>
> + reg = <0x1e785074 0x1c>;<br>
> + status = "disabled";<br>
> + };<br>
> +<br>
> + uart1: serial@1e783000 {<br>
> + compatible = "ns16550a";<br>
> + reg = <0x1e783000 0x1000>;<br>
> + reg-shift = <2>;<br>
> + interrupts = <9>;<br>
> + clocks = <&clk_uart>;<br>
> + no-loopback-test;<br>
> + status = "disabled";<br>
> + };<br>
> +<br>
> + uart2: serial@1e78d000 {<br>
> + compatible = "ns16550a";<br>
> + reg = <0x1e78d000 0x1000>;<br>
> + reg-shift = <2>;<br>
> + interrupts = <32>;<br>
> + clocks = <&clk_uart>;<br>
> + no-loopback-test;<br>
> + status = "disabled";<br>
> + };<br>
> +<br>
> + uart3: serial@1e78e000 {<br>
> + compatible = "ns16550a";<br>
> + reg = <0x1e78e000 0x1000>;<br>
> + reg-shift = <2>;<br>
> + interrupts = <33>;<br>
> + clocks = <&clk_uart>;<br>
> + no-loopback-test;<br>
> + status = "disabled";<br>
> + };<br>
> +<br>
> + uart4: serial@1e78f000 {<br>
> + compatible = "ns16550a";<br>
> + reg = <0x1e78f000 0x1000>;<br>
> + reg-shift = <2>;<br>
> + interrupts = <34>;<br>
> + clocks = <&clk_uart>;<br>
> + no-loopback-test;<br>
> + status = "disabled";<br>
> + };<br>
> +<br>
> + uart5: serial@1e784000 {<br>
> + compatible = "ns16550a";<br>
> + reg = <0x1e784000 0x1000>;<br>
> + reg-shift = <2>;<br>
> + interrupts = <10>;<br>
> + clocks = <&clk_uart>;<br>
> + current-speed = <38400>;<br>
> + no-loopback-test;<br>
> + status = "disabled";<br>
> + };<br>
> +<br>
> + vuart: vuart@1e787000 {<br>
> + compatible = "aspeed,vuart";<br>
> + reg = <0x1e787000 0x1000>;<br>
> + reg-shift = <2>;<br>
> + interrupts = <8>;<br>
> + clocks = <&clk_uart>;<br>
> + no-loopback-test;<br>
> + status = "disabled";<br>
> + };<br>
> +<br>
> + i2c: i2c@1e78a000 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <1>;<br>
> + #interrupt-cells = <1>;<br>
> +<br>
> + compatible = "aspeed,ast2400-i2c-<wbr>controller";<br>
> + reg = <0x1e78a000 0x40>;<br>
> + ranges = <0 0x1e78a000 0x1000>;<br>
> + interrupts = <12>;<br>
> + clocks = <&clk_apb>;<br>
> + clock-ranges;<br>
> + interrupt-controller;<br>
> +<br>
> + i2c0: i2c-bus@40 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x40 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <0>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <0>;<br>
> + interrupt-parent = <&i2c>;<br>
> + };<br>
> +<br>
> + i2c1: i2c-bus@80 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x80 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <1>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <1>;<br>
> + };<br>
> +<br>
> + i2c2: i2c-bus@c0 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0xC0 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <2>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <2>;<br>
> + pinctrl-names = "default";<br>
> + pinctrl-0 = <&pinctrl_i2c3_default>;<br>
> + };<br>
> +<br>
> + i2c3: i2c-bus@100 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x100 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <3>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <3>;<br>
> + pinctrl-names = "default";<br>
> + pinctrl-0 = <&pinctrl_i2c4_default>;<br>
> + };<br>
> +<br>
> + i2c4: i2c-bus@140 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x140 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <4>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <4>;<br>
> + pinctrl-names = "default";<br>
> + pinctrl-0 = <&pinctrl_i2c5_default>;<br>
> + };<br>
> +<br>
> + i2c5: i2c-bus@180 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x180 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <5>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <5>;<br>
> + pinctrl-names = "default";<br>
> + pinctrl-0 = <&pinctrl_i2c6_default>;<br>
> + };<br>
> +<br>
> + i2c6: i2c-bus@1c0 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x1C0 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <6>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <6>;<br>
> + pinctrl-names = "default";<br>
> + pinctrl-0 = <&pinctrl_i2c7_default>;<br>
> + };<br>
> +<br>
> + i2c7: i2c-bus@300 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x300 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <7>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <7>;<br>
> + pinctrl-names = "default";<br>
> + pinctrl-0 = <&pinctrl_i2c8_default>;<br>
> + };<br>
> +<br>
> + i2c8: i2c-bus@340 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x340 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <8>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <8>;<br>
> + pinctrl-names = "default";<br>
> + pinctrl-0 = <&pinctrl_i2c9_default>;<br>
> + };<br>
> +<br>
> + i2c9: i2c-bus@380 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x380 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <9>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <9>;<br>
> + pinctrl-names = "default";<br>
> + pinctrl-0 = <&pinctrl_i2c10_default>;<br>
> + };<br>
> +<br>
> + i2c10: i2c-bus@3c0 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x3c0 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <10>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <10>;<br>
> + pinctrl-names = "default";<br>
> + pinctrl-0 = <&pinctrl_i2c11_default>;<br>
> + };<br>
> +<br>
> + i2c11: i2c-bus@400 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x400 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <11>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <11>;<br>
> + pinctrl-names = "default";<br>
> + pinctrl-0 = <&pinctrl_i2c12_default>;<br>
> + };<br>
> +<br>
> + i2c12: i2c-bus@440 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x440 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <12>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <12>;<br>
> + pinctrl-names = "default";<br>
> + pinctrl-0 = <&pinctrl_i2c13_default>;<br>
> + };<br>
> +<br>
> + i2c13: i2c-bus@480 {<br>
> + #address-cells = <1>;<br>
> + #size-cells = <0>;<br>
> + reg = <0x480 0x40>;<br>
> + compatible = "aspeed,ast2400-i2c-bus";<br>
> + bus = <13>;<br>
> + clock-frequency = <100000>;<br>
> + status = "disabled";<br>
> + interrupts = <13>;<br>
> + pinctrl-names = "default";<br>
> + pinctrl-0 = <&pinctrl_i2c14_default>;<br>
> + };<br>
> +<br>
> + };<br>
> +<br>
> + };<br>
> + };<br>
> +};<br>
> diff --git a/board/aspeed/ast-g5/ast-g5.c b/board/aspeed/ast-g5/ast-g5.c<br>
> index 81ea88a..6fa1e12 100644<br>
> --- a/board/aspeed/ast-g5/ast-g5.c<br>
> +++ b/board/aspeed/ast-g5/ast-g5.c<br>
> @@ -52,7 +52,6 @@ int board_init(void)<br>
> {<br>
> /* adress of boot parameters */<br>
> gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;<br>
> - gd->flags = 0;<br>
> return 0;<br>
> }<br>
><br>
> --<br>
> 2.8.0.rc3.226.g39d4020<br>
><br>
</div></div>> ______________________________<wbr>_________________<br>
> openbmc mailing list<br>
> <a href="mailto:openbmc@lists.ozlabs.org">openbmc@lists.ozlabs.org</a><br>
> <a href="https://lists.ozlabs.org/listinfo/openbmc" rel="noreferrer" target="_blank">https://lists.ozlabs.org/<wbr>listinfo/openbmc</a><br>
</blockquote></div><br><br clear="all"><div><br></div>-- <br><div class="gmail_signature" data-smartmail="gmail_signature"><div><b>M</b>axim <b>S</b>loyko</div></div>
</div></div>