<html><head><meta http-equiv="content-type" content="text/html; charset=utf-8"></head><body dir="auto">Hi Bjorn,<div><br></div><div>Sorry for my late answer. The X1000 boots and works since yesterday. <span style="background-color: rgba(255, 255, 255, 0);">I think the following patch solved the issue: <a href="https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c591c2e36ccc9a08f265841d2fd68e35327ab3c4">https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c591c2e36ccc9a08f265841d2fd68e35327ab3c4</a></span></div><div><br></div><div>Cheers,</div><div>Christian<br><br><div id="AppleMailSignature">Sent from my iPhone</div><div><br>On 10. Feb 2018, at 16:43, Bjorn Helgaas <<a href="mailto:helgaas@kernel.org">helgaas@kernel.org</a>> wrote:<br><br></div><blockquote type="cite"><div><span>On Sat, Feb 10, 2018 at 09:05:40AM +0100, Christian Zigotzky wrote:</span><br><blockquote type="cite"><span>Hi All,</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>The AmigaOne X1000 doesn’t boot anymore since the PCI updates. I</span><br></blockquote><blockquote type="cite"><span>have seen, that the PCI updates are different to the updates below.</span><br></blockquote><blockquote type="cite"><span>The code below works but the latest not. Is there a problem with the</span><br></blockquote><blockquote type="cite"><span>latest PCI updates currently?</span><br></blockquote><span></span><br><span>I'm not aware of a problem, and it *looks* like the patch below is in</span><br><span>Linus' tree (I'm looking at 9a61df9e5f74 ("Merge tag 'kbuild-v4.16-2'</span><br><span>of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild")).</span><br><span></span><br><span>I assume you're still booting with "pci=pcie_scan_all", since I don't</span><br><span>think we ever got a quirk to set PCI_SCAN_ALL_PCIE_DEVS automatically.</span><br><span></span><br><span>If AmigaOne X1000 doesn't boot with "pci=pcie_scan_all", can you diff</span><br><span>the working only_one_child() with the current upstream? I compared</span><br><span>the version in my pci/enumeration branch with what's upstream, and</span><br><span>they're identical. So maybe the original patch I applied was wrong?</span><br><span></span><br><span>If you have a patch that works, can you post it and maybe I can sort</span><br><span>out what's different?</span><br><span></span><br><blockquote type="cite"><span>On 2. Dec 2017, at 20:18, Bjorn Helgaas <<a href="mailto:helgaas@kernel.org">helgaas@kernel.org</a>> wrote:</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>On Fri, Dec 01, 2017 at 06:27:10PM -0600, Bjorn Helgaas wrote:</span><br></blockquote><blockquote type="cite"><span>From: Bjorn Helgaas <<a href="mailto:bhelgaas@google.com">bhelgaas@google.com</a>></span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>PCIe Downstream Ports normally have only a Device 0 below them. To</span><br></blockquote><blockquote type="cite"><span>optimize enumeration, we don't scan for other devices *unless* the</span><br></blockquote><blockquote type="cite"><span>PCI_SCAN_ALL_PCIE_DEVS flag is set by set by quirks or the</span><br></blockquote><blockquote type="cite"><span>"pci=pcie_scan_all" kernel parameter.</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>Previously PCI_SCAN_ALL_PCIE_DEVS only affected scanning below Switch</span><br></blockquote><blockquote type="cite"><span>Downstream Ports, not Root Ports.</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>But the "Nemo" system, also known as the AmigaOne X1000, has a PA Semi Root</span><br></blockquote><blockquote type="cite"><span>Port whose link leads to an AMD/ATI SB600 South Bridge. The Root Port is a</span><br></blockquote><blockquote type="cite"><span>PCIe device, of course, but the SB600 contains only conventional PCI</span><br></blockquote><blockquote type="cite"><span>devices with no visible PCIe port.</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>Simplify and restructure only_one_child() so that we scan for all possible</span><br></blockquote><blockquote type="cite"><span>devices below Root Ports as well as Switch Downstream Ports when</span><br></blockquote><blockquote type="cite"><span>PCI_SCAN_ALL_PCIE_DEVS is set.</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>This is enough to make Nemo work with "pci=pcie_scan_all". We would also</span><br></blockquote><blockquote type="cite"><span>like to add a quirk to set PCI_SCAN_ALL_PCIE_DEVS automatically on Nemo so</span><br></blockquote><blockquote type="cite"><span>users wouldn't have to use the "pci=pcie_scan_all" parameter, but we don't</span><br></blockquote><blockquote type="cite"><span>have that yet.</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>Link: <a href="https://lkml.kernel.org/r/CAErSpo55Q8Q=5p6_+uu7ahnw+53ibVDNRXxrzRV9QnUr_9EUfw@mail.gmail.com">https://lkml.kernel.org/r/CAErSpo55Q8Q=5p6_+uu7ahnw+53ibVDNRXxrzRV9QnUr_9EUfw@mail.gmail.com</a></span><br></blockquote><blockquote type="cite"><span>Link: <a href="https://bugzilla.kernel.org/show_bug.cgi?id=198057">https://bugzilla.kernel.org/show_bug.cgi?id=198057</a></span><br></blockquote><blockquote type="cite"><span>Reported-and-Tested-by: Christian Zigotzky <<a href="mailto:chzigotzky@xenosoft.de">chzigotzky@xenosoft.de</a>></span><br></blockquote><blockquote type="cite"><span>Signed-off-by: Bjorn Helgaas <<a href="mailto:bhelgaas@google.com">bhelgaas@google.com</a>></span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>Applied to pci/enumeration for v4.16.</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>---</span><br></blockquote><blockquote type="cite"><span>drivers/pci/probe.c | 25 +++++++++++++++----------</span><br></blockquote><blockquote type="cite"><span>1 file changed, 15 insertions(+), 10 deletions(-)</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c</span><br></blockquote><blockquote type="cite"><span>index 14e0ea1ff38b..303c0cb0550c 100644</span><br></blockquote><blockquote type="cite"><span>--- a/drivers/pci/probe.c</span><br></blockquote><blockquote type="cite"><span>+++ b/drivers/pci/probe.c</span><br></blockquote><blockquote type="cite"><span>@@ -2215,22 +2215,27 @@ static unsigned next_fn(struct pci_bus *bus, struct pci_dev *dev, unsigned fn)</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>static int only_one_child(struct pci_bus *bus)</span><br></blockquote><blockquote type="cite"><span>{</span><br></blockquote><blockquote type="cite"><span>- struct pci_dev *parent = bus->self;</span><br></blockquote><blockquote type="cite"><span>+ struct pci_dev *bridge = bus->self;</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span>- if (!parent || !pci_is_pcie(parent))</span><br></blockquote><blockquote type="cite"><span>+ /*</span><br></blockquote><blockquote type="cite"><span>+ * Systems with unusual topologies set PCI_SCAN_ALL_PCIE_DEVS so</span><br></blockquote><blockquote type="cite"><span>+ * we scan for all possible devices, not just Device 0.</span><br></blockquote><blockquote type="cite"><span>+ */</span><br></blockquote><blockquote type="cite"><span>+ if (pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))</span><br></blockquote><blockquote type="cite"><span> return 0;</span><br></blockquote><blockquote type="cite"><span>- if (pci_pcie_type(parent) == PCI_EXP_TYPE_ROOT_PORT)</span><br></blockquote><blockquote type="cite"><span>- return 1;</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote><blockquote type="cite"><span> /*</span><br></blockquote><blockquote type="cite"><span>- * PCIe downstream ports are bridges that normally lead to only a</span><br></blockquote><blockquote type="cite"><span>- * device 0, but if PCI_SCAN_ALL_PCIE_DEVS is set, scan all</span><br></blockquote><blockquote type="cite"><span>- * possible devices, not just device 0. See PCIe spec r3.0,</span><br></blockquote><blockquote type="cite"><span>- * sec 7.3.1.</span><br></blockquote><blockquote type="cite"><span>+ * A PCIe Downstream Port normally leads to a Link with only Device</span><br></blockquote><blockquote type="cite"><span>+ * 0 on it (PCIe spec r3.1, sec 7.3.1). As an optimization, scan</span><br></blockquote><blockquote type="cite"><span>+ * only for Device 0 in that situation.</span><br></blockquote><blockquote type="cite"><span>+ *</span><br></blockquote><blockquote type="cite"><span>+ * Checking has_secondary_link is a hack to identify Downstream</span><br></blockquote><blockquote type="cite"><span>+ * Ports because sometimes Switches are configured such that the</span><br></blockquote><blockquote type="cite"><span>+ * PCIe Port Type labels are backwards.</span><br></blockquote><blockquote type="cite"><span> */</span><br></blockquote><blockquote type="cite"><span>- if (parent->has_secondary_link &&</span><br></blockquote><blockquote type="cite"><span>- !pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))</span><br></blockquote><blockquote type="cite"><span>+ if (bridge && pci_is_pcie(bridge) && bridge->has_secondary_link)</span><br></blockquote><blockquote type="cite"><span> return 1;</span><br></blockquote><blockquote type="cite"><span>+</span><br></blockquote><blockquote type="cite"><span> return 0;</span><br></blockquote><blockquote type="cite"><span>}</span><br></blockquote><blockquote type="cite"><span></span><br></blockquote></div></blockquote></div></body></html>