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<div class="moz-cite-prefix">On 01/27/2016 03:26 AM, Maciej W.
Rozycki wrote:<br>
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<blockquote
cite="mid:alpine.DEB.2.00.1601271116520.5958@tp.orcam.me.uk"
type="cite">
<pre wrap="">On Fri, 15 Jan 2016, Leonid Yegoshin wrote:
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<pre wrap="">So you need to build a different kernel for some types of MIPS systems?
Or do you do boot-time rewriting, like a number of other arches do?
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<pre wrap="">
I don't know. I would like to have responses. Ralf asked Maciej about old
systems and that came nowhere. Even rewrite - don't know what to do with that:
no lightweight SYNC or no SYNC at all - yes, it is still possible that SYNC on
some systems can be too heavy or even harmful, nobody tested that.
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<pre wrap="">
I don't recall being asked;
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In <a class="moz-txt-link-freetext" href="http://patchwork.linux-mips.org/patch/10505/">http://patchwork.linux-mips.org/patch/10505/</a> the very last mesg
exchange is:<br>
<br>
<pre class="content">Maciej,
do you have an R4000 / R4600 / R5000 / R7000 / SiByte system at hand to
test this?
...
Ralf
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<div class="comment">
<div class="meta"><a
href="http://patchwork.linux-mips.org/project/linux-mips/list/?submitter=79">Maciej
W. Rozycki</a> - June 5, 2015, 9:18 p.m.</div>
<pre class="content">On Fri, 5 Jun 2015, Ralf Baechle wrote:
<span class="quote">
> do you have an R4000 / R4600 / R5000 / R7000 / SiByte system at hand to</span>
<span class="quote">> test this?</span>
I should be able to check R4400 (that is virtually the same as R4000)
next week or so. As to SiByte -- not before next month I'm afraid. I
don't have access to any of the other processors you named. You may
want to find a better person if you want to accept this change soon.
Maciej
</pre>
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... and that stops forever...<br>
<br>
- Leonid.<br>
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