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    Hi Wolfram,<br>
    <br>
    Based on your patch:<br>
    "[RFC V2 04/12] i2c: opal: make use of the new infrastructure for
    quirks"<br>
    <br>
    <br>
    From: Neelesh Gupta <a class="moz-txt-link-rfc2396E" href="mailto:neelegup@linux.vnet.ibm.com"><neelegup@linux.vnet.ibm.com></a><br>
    Subject: [PATCH] i2c: opal: Update quirk flags to do
    write-then-anything<br>
    <div class="moz-text-plain" wrap="true" graphical-quote="true"
      style="font-family: -moz-fixed; font-size: 12px;" lang="x-unicode">
      <pre wrap="">Support write-then-anything in the case of 2 i2c messages
for i2c transfer.

Signed-off-by: Neelesh Gupta <a class="moz-txt-link-rfc2396E" href="mailto:neelegup@linux.vnet.ibm.com"><neelegup@linux.vnet.ibm.com></a>
---
 drivers/i2c/busses/i2c-opal.c |   11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/i2c/busses/i2c-opal.c b/drivers/i2c/busses/i2c-opal.c
index b2788ec..1ec7fc9 100644
--- a/drivers/i2c/busses/i2c-opal.c
+++ b/drivers/i2c/busses/i2c-opal.c
@@ -104,7 +104,8 @@ static int i2c_opal_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
                req.buffer_ra = cpu_to_be64(__pa(msgs[0].buf));
                break;
        case 2:
-               req.type = OPAL_I2C_SM_READ;
+               req.type = (msgs[1].flags & I2C_M_RD) ?
+                       OPAL_I2C_SM_READ : OPAL_I2C_SM_WRITE;
                req.addr = cpu_to_be16(msgs[0].addr);
                req.subaddr_sz = msgs[0].len;
                for (i = 0; i < msgs[0].len; i++)
@@ -199,13 +200,11 @@ static const struct i2c_algorithm i2c_opal_algo = {
        .functionality  = i2c_opal_func,
 };

-/* For two messages, we basically support only simple
- * smbus transactions of a write plus a read. We might
- * want to allow also two writes but we'd have to bounce
- * the data into a single buffer.
+/* For two messages, we basically support simple smbus transactions of a
+ * write-then-anything.
  */
 static struct i2c_adapter_quirks i2c_opal_quirks = {
-       .flags = I2C_AQ_COMB_WRITE_THEN_READ,
+       .flags = I2C_AQ_COMB | I2C_AQ_COMB_WRITE_FIRST | I2C_AQ_COMB_SAME_ADDR,
        .max_comb_1st_msg_len = 4,
 };


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    <br>
    <br>
    <br>
    <div class="moz-cite-prefix">On 02/25/2015 09:31 PM, Wolfram Sang
      wrote:<br>
    </div>
    <blockquote
      cite="mid:1424880126-15047-5-git-send-email-wsa@the-dreams.de"
      type="cite">
      <pre wrap="">From: Wolfram Sang <a class="moz-txt-link-rfc2396E" href="mailto:wsa+renesas@sang-engineering.com"><wsa+renesas@sang-engineering.com></a>

Signed-off-by: Wolfram Sang <a class="moz-txt-link-rfc2396E" href="mailto:wsa+renesas@sang-engineering.com"><wsa+renesas@sang-engineering.com></a>
---
 drivers/i2c/busses/i2c-opal.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/i2c/busses/i2c-opal.c b/drivers/i2c/busses/i2c-opal.c
index 16f90b1a750894..b2788ecad5b3cb 100644
--- a/drivers/i2c/busses/i2c-opal.c
+++ b/drivers/i2c/busses/i2c-opal.c
@@ -104,17 +104,6 @@ static int i2c_opal_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
                req.buffer_ra = cpu_to_be64(__pa(msgs[0].buf));
                break;
        case 2:
-               /* For two messages, we basically support only simple
-                * smbus transactions of a write plus a read. We might
-                * want to allow also two writes but we'd have to bounce
-                * the data into a single buffer.
-                */
-               if ((msgs[0].flags & I2C_M_RD) || !(msgs[1].flags & I2C_M_RD))
-                       return -EOPNOTSUPP;
-               if (msgs[0].len > 4)
-                       return -EOPNOTSUPP;
-               if (msgs[0].addr != msgs[1].addr)
-                       return -EOPNOTSUPP;
                req.type = OPAL_I2C_SM_READ;
                req.addr = cpu_to_be16(msgs[0].addr);
                req.subaddr_sz = msgs[0].len;
@@ -210,6 +199,16 @@ static const struct i2c_algorithm i2c_opal_algo = {
        .functionality  = i2c_opal_func,
 };
 
+/* For two messages, we basically support only simple
+ * smbus transactions of a write plus a read. We might
+ * want to allow also two writes but we'd have to bounce
+ * the data into a single buffer.
+ */
+static struct i2c_adapter_quirks i2c_opal_quirks = {
+       .flags = I2C_AQ_COMB_WRITE_THEN_READ,
+       .max_comb_1st_msg_len = 4,
+};
+
 static int i2c_opal_probe(struct platform_device *pdev)
 {
        struct i2c_adapter      *adapter;
@@ -232,6 +231,7 @@ static int i2c_opal_probe(struct platform_device *pdev)
 
        adapter->algo = &i2c_opal_algo;
        adapter->algo_data = (void *)(unsigned long)opal_id;
+       adapter->quirks = &i2c_opal_quirks;
        adapter->dev.parent = &pdev->dev;
        adapter->dev.of_node = of_node_get(pdev->dev.of_node);
        pname = of_get_property(pdev->dev.of_node, "ibm,port-name", NULL);
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