<html><body>
<p><tt><font size="2">Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote on 05/06/2013 04:37:08 PM:<br>
<br>
> Benjamin Herrenschmidt <benh@kernel.crashing.org> </font></tt><br>
<tt><font size="2">> 05/06/2013 04:37 PM</font></tt><br>
<tt><font size="2">> <br>
> To</font></tt><br>
<tt><font size="2">> <br>
> Ryan Arnold/Rochester/IBM@IBMUS</font></tt><br>
<tt><font size="2">> <br>
> cc</font></tt><br>
<tt><font size="2">> <br>
> Nishanth Aravamudan <nacc@linux.vnet.ibm.com>, linuxppc-<br>
> dev@lists.ozlabs.org, Michael R Meissner/Cambridge/IBM@IBMUS, <br>
> Michael Neuling <michael.neuling@au1.ibm.com>, Peter Bergner/<br>
> Rochester/IBM@IBMUS, Steve Munroe/Rochester/IBM@IBMUS</font></tt><br>
<tt><font size="2">> <br>
> Subject</font></tt><br>
<tt><font size="2">> <br>
> Re: [PATCH] arch/powerpc: advertise ISA2.07, HTM, DSCR, EBB and ISEL<br>
> bits in HWCAP2</font></tt><br>
<tt><font size="2">> <br>
> On Mon, 2013-05-06 at 09:38 -0500, Ryan Arnold wrote:<br>
> > My understanding was that these bits being 'on' is an indication of<br>
> > what features the hardware supports (or what the kernel emulates) and<br>
> > a not an indication of whether that facility is currently enabled or<br>
> > not. If the hardware supports a particular feature but it is not<br>
> > enabled I'd expect that user-space usage of that feature would cause<br>
> > the kernel to trap on a facility availability exception (which is how<br>
> > Altivec/VMX is implemented, being defaulted to turned off).<br>
> <br>
> Right but the discussion is about whether we should expose the bits<br>
> when the kernel doesn't have the ability to handle the feature :-)<br>
> <br>
> IE. We need to remove the HTM feature if the kernel is compiled without<br>
> transactional memory support.</font></tt><br>
<br>
<tt><font size="2">Thanks for explaining. This is exactly how it should work.</font></tt><br>
<br>
<tt><font size="2">Ryan</font></tt><br>
</body></html>