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<blockquote cite="mid:1359948180.25414.11.camel@concordia"
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<pre wrap="">On Tue, 2013-01-15 at 15:38 +0800, Mike Qiu wrote:
</pre>
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<pre wrap="">Currently, multiple MSI feature hasn't been enabled in pSeries,
These patches try to enbale this feature.
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<pre wrap="">
Hi Mike,
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<pre wrap="">These patches have been tested by using ipr driver, and the driver patch
has been made by Wen Xiong <a class="moz-txt-link-rfc2396E" href="mailto:wenxiong@linux.vnet.ibm.com"><wenxiong@linux.vnet.ibm.com></a>:
</pre>
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<pre wrap="">
So who wrote these patches? Normally we would expect the original author
to post the patches if at all possible.</pre>
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Hi Michael<br>
<br>
These Multiple MSI patches were wrote by myself, you know this
feature has not enabled<br>
and it need device driver to test whether it works suitable. So I
test my patches use <br>
Wen Xiong's ipr patches, which has been send out to the
maillinglist.<br>
<br>
I'm the<strong> </strong>original author :)<br>
<blockquote cite="mid:1359948180.25414.11.camel@concordia"
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<pre wrap="">[PATCH 0/7] Add support for new IBM SAS controllers
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<pre wrap="">
I would like to see the full series, including the driver enablement.</pre>
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Yep, but the driver patches were wrote by Wen Xiong and has been
send out.<br>
I just use her patches to test my patches. all device support
Multiple MSI<br>
can use my feature not only IBM SAS controllers, I also test my
patches use <br>
the broadcom wireless card tg3, and also works OK.<br>
<blockquote cite="mid:1359948180.25414.11.camel@concordia"
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<pre wrap="">Test platform: One partition of pSeries with one cpu core(4 SMTs) and
RAID bus controller: IBM PCI-E IPR SAS Adapter (ASIC) in POWER7
OS version: SUSE Linux Enterprise Server 11 SP2 (ppc64) with 3.8-rc3 kernel
IRQ 21 and 22 are assigned to the ipr device which support 2 mutiple MSI.
The test results is shown by 'cat /proc/interrups':
CPU0 CPU1 CPU2 CPU3
21: 6 5 5 5 XICS Level host1-0
22: 817 814 816 813 XICS Level host1-1
</pre>
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<pre wrap="">
This shows that you are correctly configuring two MSIs.
But the key advantage of using multiple interrupts is to distribute load
across CPUs and improve performance. So I would like to see some
performance numbers that show that there is a real benefit for all the
extra complexity in the code.</pre>
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Yes, the system just has suport two MSIs. Anyway, I will try to do
some proformance<br>
test, to show the real benefit.<br>
But actually it needs the driver to do so. As the data show above,
it seems there is <br>
some problems in use the interrupt, the irq 21 use few, most use 22,
I will discuss <br>
with the driver author to see why and if she fixed, I will give out
the proformance<br>
result.<br>
<br>
Thanks<br>
<br>
Mike<br>
<br>
<blockquote cite="mid:1359948180.25414.11.camel@concordia"
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<pre wrap="">
cheers
</pre>
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