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You have been great. Im in a pinch. I put linux on alot of computers. The customers want ITunes. Do you have a package that will work on RPM or Debian.<br>Bob<br><br><div>> From: linuxppc-dev-request@lists.ozlabs.org<br>> Subject: Linuxppc-dev Digest, Vol 87, Issue 61<br>> To: linuxppc-dev@lists.ozlabs.org<br>> Date: Fri, 11 Nov 2011 03:15:13 +1100<br>> <br>> Send Linuxppc-dev mailing list submissions to<br>> linuxppc-dev@lists.ozlabs.org<br>> <br>> To subscribe or unsubscribe via the World Wide Web, visit<br>> https://lists.ozlabs.org/listinfo/linuxppc-dev<br>> or, via email, send a message with subject or body 'help' to<br>> linuxppc-dev-request@lists.ozlabs.org<br>> <br>> You can reach the person managing the list at<br>> linuxppc-dev-owner@lists.ozlabs.org<br>> <br>> When replying, please edit your Subject line so it is more specific<br>> than "Re: Contents of Linuxppc-dev digest..."<br>> <br>> <br>> Today's Topics:<br>> <br>> 1. [RFC][PATCH 23/30] powerpc/85xx: Rework P4080DS device trees<br>> (Kumar Gala)<br>> <br>> <br>> ----------------------------------------------------------------------<br>> <br>> Message: 1<br>> Date: Thu, 10 Nov 2011 10:14:06 -0600<br>> From: Kumar Gala <galak@kernel.crashing.org><br>> To: linuxppc-dev@ozlabs.org<br>> Subject: [RFC][PATCH 23/30] powerpc/85xx: Rework P4080DS device trees<br>> Message-ID:<br>> <1320941653-29797-24-git-send-email-galak@kernel.crashing.org><br>> <br>> Signed-off-by: Kumar Gala <galak@kernel.crashing.org><br>> ---<br>> arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 342 ++++++++++++<br>> arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi | 145 +++++<br>> arch/powerpc/boot/dts/p4080ds.dts | 14 +-<br>> arch/powerpc/boot/dts/p4080si.dtsi | 755 ---------------------------<br>> 4 files changed, 498 insertions(+), 758 deletions(-)<br>> create mode 100644 arch/powerpc/boot/dts/fsl/p4080si-post.dtsi<br>> create mode 100644 arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi<br>> delete mode 100644 arch/powerpc/boot/dts/p4080si.dtsi<br>> <br>> diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi<br>> new file mode 100644<br>> index 0000000..1510991<br>> --- /dev/null<br>> +++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi<br>> @@ -0,0 +1,342 @@<br>> +/*<br>> + * P4080/P4040 Silicon/SoC Device Tree Source (post include)<br>> + *<br>> + * Copyright 2011 Freescale Semiconductor Inc.<br>> + *<br>> + * Redistribution and use in source and binary forms, with or without<br>> + * modification, are permitted provided that the following conditions are met:<br>> + * * Redistributions of source code must retain the above copyright<br>> + * notice, this list of conditions and the following disclaimer.<br>> + * * Redistributions in binary form must reproduce the above copyright<br>> + * notice, this list of conditions and the following disclaimer in the<br>> + * documentation and/or other materials provided with the distribution.<br>> + * * Neither the name of Freescale Semiconductor nor the<br>> + * names of its contributors may be used to endorse or promote products<br>> + * derived from this software without specific prior written permission.<br>> + *<br>> + *<br>> + * ALTERNATIVELY, this software may be distributed under the terms of the<br>> + * GNU General Public License ("GPL") as published by the Free Software<br>> + * Foundation, either version 2 of that License or (at your option) any<br>> + * later version.<br>> + *<br>> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY<br>> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED<br>> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE<br>> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY<br>> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES<br>> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;<br>> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND<br>> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT<br>> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS<br>> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.<br>> + */<br>> +<br>> +&lbc {<br>> + compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";<br>> + interrupts = <25 2 0 0>;<br>> + #address-cells = <2>;<br>> + #size-cells = <1>;<br>> +};<br>> +<br>> +/* controller at 0x200000 */<br>> +&pci0 {<br>> + compatible = "fsl,p4080-pcie";<br>> + device_type = "pci";<br>> + #size-cells = <2>;<br>> + #address-cells = <3>;<br>> + bus-range = <0x0 0xff>;<br>> + clock-frequency = <33333333>;<br>> + interrupts = <16 2 1 15>;<br>> + pcie@0 {<br>> + reg = <0 0 0 0 0>;<br>> + #interrupt-cells = <1>;<br>> + #size-cells = <2>;<br>> + #address-cells = <3>;<br>> + device_type = "pci";<br>> + interrupts = <16 2 1 15>;<br>> + interrupt-map-mask = <0xf800 0 0 7>;<br>> + interrupt-map = <<br>> + /* IDSEL 0x0 */<br>> + 0000 0 0 1 &mpic 40 1 0 0<br>> + 0000 0 0 2 &mpic 1 1 0 0<br>> + 0000 0 0 3 &mpic 2 1 0 0<br>> + 0000 0 0 4 &mpic 3 1 0 0<br>> + >;<br>> + };<br>> +};<br>> +<br>> +/* controller at 0x201000 */<br>> +&pci1 {<br>> + compatible = "fsl,p4080-pcie";<br>> + device_type = "pci";<br>> + #size-cells = <2>;<br>> + #address-cells = <3>;<br>> + bus-range = <0 0xff>;<br>> + clock-frequency = <33333333>;<br>> + interrupts = <16 2 1 14>;<br>> + pcie@0 {<br>> + reg = <0 0 0 0 0>;<br>> + #interrupt-cells = <1>;<br>> + #size-cells = <2>;<br>> + #address-cells = <3>;<br>> + device_type = "pci";<br>> + interrupts = <16 2 1 14>;<br>> + interrupt-map-mask = <0xf800 0 0 7>;<br>> + interrupt-map = <<br>> + /* IDSEL 0x0 */<br>> + 0000 0 0 1 &mpic 41 1 0 0<br>> + 0000 0 0 2 &mpic 5 1 0 0<br>> + 0000 0 0 3 &mpic 6 1 0 0<br>> + 0000 0 0 4 &mpic 7 1 0 0<br>> + >;<br>> + };<br>> +};<br>> +<br>> +/* controller at 0x202000 */<br>> +&pci2 {<br>> + compatible = "fsl,p4080-pcie";<br>> + device_type = "pci";<br>> + #size-cells = <2>;<br>> + #address-cells = <3>;<br>> + bus-range = <0x0 0xff>;<br>> + clock-frequency = <33333333>;<br>> + interrupts = <16 2 1 13>;<br>> + pcie@0 {<br>> + reg = <0 0 0 0 0>;<br>> + #interrupt-cells = <1>;<br>> + #size-cells = <2>;<br>> + #address-cells = <3>;<br>> + device_type = "pci";<br>> + interrupts = <16 2 1 13>;<br>> + interrupt-map-mask = <0xf800 0 0 7>;<br>> + interrupt-map = <<br>> + /* IDSEL 0x0 */<br>> + 0000 0 0 1 &mpic 42 1 0 0<br>> + 0000 0 0 2 &mpic 9 1 0 0<br>> + 0000 0 0 3 &mpic 10 1 0 0<br>> + 0000 0 0 4 &mpic 11 1 0 0<br>> + >;<br>> + };<br>> +};<br>> +<br>> +&rio {<br>> + #address-cells = <2>;<br>> + #size-cells = <2>;<br>> + compatible = "fsl,rapidio-delta";<br>> + interrupts = <<br>> + 16 2 1 11 /* err_irq */<br>> + 56 2 0 0 /* bell_outb_irq */<br>> + 57 2 0 0 /* bell_inb_irq */<br>> + 60 2 0 0 /* msg1_tx_irq */<br>> + 61 2 0 0 /* msg1_rx_irq */<br>> + 62 2 0 0 /* msg2_tx_irq */<br>> + 63 2 0 0>; /* msg2_rx_irq */<br>> +};<br>> +<br>> +&dcsr {<br>> + #address-cells = <1>;<br>> + #size-cells = <1>;<br>> + compatible = "fsl,dcsr", "simple-bus";<br>> +<br>> + dcsr-epu@0 {<br>> + compatible = "fsl,dcsr-epu";<br>> + interrupts = <52 2 0 0<br>> + 84 2 0 0<br>> + 85 2 0 0>;<br>> + reg = <0x0 0x1000>;<br>> + };<br>> + dcsr-npc {<br>> + compatible = "fsl,dcsr-npc";<br>> + reg = <0x1000 0x1000 0x1000000 0x8000>;<br>> + };<br>> + dcsr-nxc@2000 {<br>> + compatible = "fsl,dcsr-nxc";<br>> + reg = <0x2000 0x1000>;<br>> + };<br>> + dcsr-corenet {<br>> + compatible = "fsl,dcsr-corenet";<br>> + reg = <0x8000 0x1000 0xB0000 0x1000>;<br>> + };<br>> + dcsr-dpaa@9000 {<br>> + compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";<br>> + reg = <0x9000 0x1000>;<br>> + };<br>> + dcsr-ocn@11000 {<br>> + compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";<br>> + reg = <0x11000 0x1000>;<br>> + };<br>> + dcsr-ddr@12000 {<br>> + compatible = "fsl,dcsr-ddr";<br>> + dev-handle = <&ddr1>;<br>> + reg = <0x12000 0x1000>;<br>> + };<br>> + dcsr-ddr@13000 {<br>> + compatible = "fsl,dcsr-ddr";<br>> + dev-handle = <&ddr2>;<br>> + reg = <0x13000 0x1000>;<br>> + };<br>> + dcsr-nal@18000 {<br>> + compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";<br>> + reg = <0x18000 0x1000>;<br>> + };<br>> + dcsr-rcpm@22000 {<br>> + compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";<br>> + reg = <0x22000 0x1000>;<br>> + };<br>> + dcsr-cpu-sb-proxy@40000 {<br>> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> + cpu-handle = <&cpu0>;<br>> + reg = <0x40000 0x1000>;<br>> + };<br>> + dcsr-cpu-sb-proxy@41000 {<br>> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> + cpu-handle = <&cpu1>;<br>> + reg = <0x41000 0x1000>;<br>> + };<br>> + dcsr-cpu-sb-proxy@42000 {<br>> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> + cpu-handle = <&cpu2>;<br>> + reg = <0x42000 0x1000>;<br>> + };<br>> + dcsr-cpu-sb-proxy@43000 {<br>> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> + cpu-handle = <&cpu3>;<br>> + reg = <0x43000 0x1000>;<br>> + };<br>> + dcsr-cpu-sb-proxy@44000 {<br>> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> + cpu-handle = <&cpu4>;<br>> + reg = <0x44000 0x1000>;<br>> + };<br>> + dcsr-cpu-sb-proxy@45000 {<br>> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> + cpu-handle = <&cpu5>;<br>> + reg = <0x45000 0x1000>;<br>> + };<br>> + dcsr-cpu-sb-proxy@46000 {<br>> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> + cpu-handle = <&cpu6>;<br>> + reg = <0x46000 0x1000>;<br>> + };<br>> + dcsr-cpu-sb-proxy@47000 {<br>> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> + cpu-handle = <&cpu7>;<br>> + reg = <0x47000 0x1000>;<br>> + };<br>> +<br>> +};<br>> +<br>> +&soc {<br>> + #address-cells = <1>;<br>> + #size-cells = <1>;<br>> + device_type = "soc";<br>> + compatible = "simple-bus";<br>> +<br>> + soc-sram-error {<br>> + compatible = "fsl,soc-sram-error";<br>> + interrupts = <16 2 1 29>;<br>> + };<br>> +<br>> + corenet-law@0 {<br>> + compatible = "fsl,corenet-law";<br>> + reg = <0x0 0x1000>;<br>> + fsl,num-laws = <32>;<br>> + };<br>> +<br>> + ddr1: memory-controller@8000 {<br>> + compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";<br>> + reg = <0x8000 0x1000>;<br>> + interrupts = <16 2 1 23>;<br>> + };<br>> +<br>> + ddr2: memory-controller@9000 {<br>> + compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";<br>> + reg = <0x9000 0x1000>;<br>> + interrupts = <16 2 1 22>;<br>> + };<br>> +<br>> + cpc: l3-cache-controller@10000 {<br>> + compatible = "fsl,p4080-l3-cache-controller", "cache";<br>> + reg = <0x10000 0x1000<br>> + 0x11000 0x1000>;<br>> + interrupts = <16 2 1 27<br>> + 16 2 1 26>;<br>> + };<br>> +<br>> + corenet-cf@18000 {<br>> + compatible = "fsl,corenet-cf";<br>> + reg = <0x18000 0x1000>;<br>> + interrupts = <16 2 1 31>;<br>> + fsl,ccf-num-csdids = <32>;<br>> + fsl,ccf-num-snoopids = <32>;<br>> + };<br>> +<br>> + iommu@20000 {<br>> + compatible = "fsl,pamu-v1.0", "fsl,pamu";<br>> + reg = <0x20000 0x5000>;<br>> + interrupts = <<br>> + 24 2 0 0<br>> + 16 2 1 30>;<br>> + };<br>> +<br>> +/include/ "qoriq-mpic.dtsi"<br>> +<br>> + guts: global-utilities@e0000 {<br>> + compatible = "fsl,qoriq-device-config-1.0";<br>> + reg = <0xe0000 0xe00>;<br>> + fsl,has-rstcr;<br>> + #sleep-cells = <1>;<br>> + fsl,liodn-bits = <12>;<br>> + };<br>> +<br>> + pins: global-utilities@e0e00 {<br>> + compatible = "fsl,qoriq-pin-control-1.0";<br>> + reg = <0xe0e00 0x200>;<br>> + #sleep-cells = <2>;<br>> + };<br>> +<br>> + clockgen: global-utilities@e1000 {<br>> + compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";<br>> + reg = <0xe1000 0x1000>;<br>> + clock-frequency = <0>;<br>> + };<br>> +<br>> + rcpm: global-utilities@e2000 {<br>> + compatible = "fsl,qoriq-rcpm-1.0";<br>> + reg = <0xe2000 0x1000>;<br>> + #sleep-cells = <1>;<br>> + };<br>> +<br>> + sfp: sfp@e8000 {<br>> + compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0";<br>> + reg = <0xe8000 0x1000>;<br>> + };<br>> +<br>> + serdes: serdes@ea000 {<br>> + compatible = "fsl,p4080-serdes";<br>> + reg = <0xea000 0x1000>;<br>> + };<br>> +<br>> +/include/ "qoriq-dma-0.dtsi"<br>> +/include/ "qoriq-dma-1.dtsi"<br>> +/include/ "qoriq-espi-0.dtsi"<br>> + spi@110000 {<br>> + fsl,espi-num-chipselects = <4>;<br>> + };<br>> +<br>> +/include/ "qoriq-esdhc-0.dtsi"<br>> + sdhc@114000 {<br>> + voltage-ranges = <3300 3300>;<br>> + sdhci,auto-cmd12;<br>> + };<br>> +<br>> +/include/ "qoriq-i2c-0.dtsi"<br>> +/include/ "qoriq-i2c-1.dtsi"<br>> +/include/ "qoriq-duart-0.dtsi"<br>> +/include/ "qoriq-duart-1.dtsi"<br>> +/include/ "qoriq-gpio-0.dtsi"<br>> +/include/ "qoriq-usb2-mph-0.dtsi"<br>> +/include/ "qoriq-usb2-dr-0.dtsi"<br>> +/include/ "qoriq-sec4.0-0.dtsi"<br>> +};<br>> diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi<br>> new file mode 100644<br>> index 0000000..b353ac9<br>> --- /dev/null<br>> +++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi<br>> @@ -0,0 +1,145 @@<br>> +/*<br>> + * P4080/P4040 Silicon/SoC Device Tree Source (pre include)<br>> + *<br>> + * Copyright 2011 Freescale Semiconductor Inc.<br>> + *<br>> + * Redistribution and use in source and binary forms, with or without<br>> + * modification, are permitted provided that the following conditions are met:<br>> + * * Redistributions of source code must retain the above copyright<br>> + * notice, this list of conditions and the following disclaimer.<br>> + * * Redistributions in binary form must reproduce the above copyright<br>> + * notice, this list of conditions and the following disclaimer in the<br>> + * documentation and/or other materials provided with the distribution.<br>> + * * Neither the name of Freescale Semiconductor nor the<br>> + * names of its contributors may be used to endorse or promote products<br>> + * derived from this software without specific prior written permission.<br>> + *<br>> + *<br>> + * ALTERNATIVELY, this software may be distributed under the terms of the<br>> + * GNU General Public License ("GPL") as published by the Free Software<br>> + * Foundation, either version 2 of that License or (at your option) any<br>> + * later version.<br>> + *<br>> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY<br>> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED<br>> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE<br>> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY<br>> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES<br>> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;<br>> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND<br>> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT<br>> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS<br>> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.<br>> + */<br>> +<br>> +/dts-v1/;<br>> +/ {<br>> + compatible = "fsl,P4080";<br>> + #address-cells = <2>;<br>> + #size-cells = <2>;<br>> + interrupt-parent = <&mpic>;<br>> +<br>> + aliases {<br>> + ccsr = &soc;<br>> + dcsr = &dcsr;<br>> +<br>> + serial0 = &serial0;<br>> + serial1 = &serial1;<br>> + serial2 = &serial2;<br>> + serial3 = &serial3;<br>> + pci0 = &pci0;<br>> + pci1 = &pci1;<br>> + pci2 = &pci2;<br>> + usb0 = &usb0;<br>> + usb1 = &usb1;<br>> + dma0 = &dma0;<br>> + dma1 = &dma1;<br>> + sdhc = &sdhc;<br>> + msi0 = &msi0;<br>> + msi1 = &msi1;<br>> + msi2 = &msi2;<br>> +<br>> + crypto = &crypto;<br>> + sec_jr0 = &sec_jr0;<br>> + sec_jr1 = &sec_jr1;<br>> + sec_jr2 = &sec_jr2;<br>> + sec_jr3 = &sec_jr3;<br>> + rtic_a = &rtic_a;<br>> + rtic_b = &rtic_b;<br>> + rtic_c = &rtic_c;<br>> + rtic_d = &rtic_d;<br>> + sec_mon = &sec_mon;<br>> +<br>> + rio0 = &rapidio0;<br>> + };<br>> +<br>> + cpus {<br>> + #address-cells = <1>;<br>> + #size-cells = <0>;<br>> +<br>> + cpu0: PowerPC,e500mc@0 {<br>> + device_type = "cpu";<br>> + reg = <0>;<br>> + next-level-cache = <&L2_0>;<br>> + L2_0: l2-cache {<br>> + next-level-cache = <&cpc>;<br>> + };<br>> + };<br>> + cpu1: PowerPC,e500mc@1 {<br>> + device_type = "cpu";<br>> + reg = <1>;<br>> + next-level-cache = <&L2_1>;<br>> + L2_1: l2-cache {<br>> + next-level-cache = <&cpc>;<br>> + };<br>> + };<br>> + cpu2: PowerPC,e500mc@2 {<br>> + device_type = "cpu";<br>> + reg = <2>;<br>> + next-level-cache = <&L2_2>;<br>> + L2_2: l2-cache {<br>> + next-level-cache = <&cpc>;<br>> + };<br>> + };<br>> + cpu3: PowerPC,e500mc@3 {<br>> + device_type = "cpu";<br>> + reg = <3>;<br>> + next-level-cache = <&L2_3>;<br>> + L2_3: l2-cache {<br>> + next-level-cache = <&cpc>;<br>> + };<br>> + };<br>> + cpu4: PowerPC,e500mc@4 {<br>> + device_type = "cpu";<br>> + reg = <4>;<br>> + next-level-cache = <&L2_4>;<br>> + L2_4: l2-cache {<br>> + next-level-cache = <&cpc>;<br>> + };<br>> + };<br>> + cpu5: PowerPC,e500mc@5 {<br>> + device_type = "cpu";<br>> + reg = <5>;<br>> + next-level-cache = <&L2_5>;<br>> + L2_5: l2-cache {<br>> + next-level-cache = <&cpc>;<br>> + };<br>> + };<br>> + cpu6: PowerPC,e500mc@6 {<br>> + device_type = "cpu";<br>> + reg = <6>;<br>> + next-level-cache = <&L2_6>;<br>> + L2_6: l2-cache {<br>> + next-level-cache = <&cpc>;<br>> + };<br>> + };<br>> + cpu7: PowerPC,e500mc@7 {<br>> + device_type = "cpu";<br>> + reg = <7>;<br>> + next-level-cache = <&L2_7>;<br>> + L2_7: l2-cache {<br>> + next-level-cache = <&cpc>;<br>> + };<br>> + };<br>> + };<br>> +};<br>> diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts<br>> index c7916dc..8ea1ae9 100644<br>> --- a/arch/powerpc/boot/dts/p4080ds.dts<br>> +++ b/arch/powerpc/boot/dts/p4080ds.dts<br>> @@ -32,7 +32,7 @@<br>> * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.<br>> */<br>> <br>> -/include/ "p4080si.dtsi"<br>> +/include/ "fsl/p4080si-pre.dtsi"<br>> <br>> / {<br>> model = "fsl,P4080DS";<br>> @@ -50,6 +50,9 @@<br>> };<br>> <br>> soc: soc@ffe000000 {<br>> + ranges = <0x00000000 0xf 0xfe000000 0x1000000>;<br>> + reg = <0xf 0xfe000000 0 0x00001000>;<br>> +<br>> spi@110000 {<br>> flash@0 {<br>> #address-cells = <1>;<br>> @@ -105,12 +108,12 @@<br>> };<br>> };<br>> <br>> - rapidio0: rapidio@ffe0c0000 {<br>> + rio: rapidio0: rapidio@ffe0c0000 {<br>> reg = <0xf 0xfe0c0000 0 0x20000>;<br>> ranges = <0 0 0xc 0x20000000 0 0x01000000>;<br>> };<br>> <br>> - localbus@ffe124000 {<br>> + lbc: localbus@ffe124000 {<br>> reg = <0xf 0xfe124000 0 0x1000>;<br>> ranges = <0 0 0xf 0xe8000000 0x08000000<br>> 3 0 0xf 0xffdf0000 0x00008000>;<br>> @@ -132,6 +135,7 @@<br>> reg = <0xf 0xfe200000 0 0x1000>;<br>> ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000<br>> 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;<br>> + fsl,msi = <&msi0>;<br>> pcie@0 {<br>> ranges = <0x02000000 0 0xe0000000<br>> 0x02000000 0 0xe0000000<br>> @@ -147,6 +151,7 @@<br>> reg = <0xf 0xfe201000 0 0x1000>;<br>> ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000<br>> 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;<br>> + fsl,msi = <&msi1>;<br>> pcie@0 {<br>> ranges = <0x02000000 0 0xe0000000<br>> 0x02000000 0 0xe0000000<br>> @@ -162,6 +167,7 @@<br>> reg = <0xf 0xfe202000 0 0x1000>;<br>> ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000<br>> 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;<br>> + fsl,msi = <&msi2>;<br>> pcie@0 {<br>> ranges = <0x02000000 0 0xe0000000<br>> 0x02000000 0 0xe0000000<br>> @@ -174,3 +180,5 @@<br>> };<br>> <br>> };<br>> +<br>> +/include/ "fsl/p4080si-post.dtsi"<br>> diff --git a/arch/powerpc/boot/dts/p4080si.dtsi b/arch/powerpc/boot/dts/p4080si.dtsi<br>> deleted file mode 100644<br>> index f20c01a..0000000<br>> --- a/arch/powerpc/boot/dts/p4080si.dtsi<br>> +++ /dev/null<br>> @@ -1,755 +0,0 @@<br>> -/*<br>> - * P4080 Silicon Device Tree Source<br>> - *<br>> - * Copyright 2009-2011 Freescale Semiconductor Inc.<br>> - *<br>> - * Redistribution and use in source and binary forms, with or without<br>> - * modification, are permitted provided that the following conditions are met:<br>> - * * Redistributions of source code must retain the above copyright<br>> - * notice, this list of conditions and the following disclaimer.<br>> - * * Redistributions in binary form must reproduce the above copyright<br>> - * notice, this list of conditions and the following disclaimer in the<br>> - * documentation and/or other materials provided with the distribution.<br>> - * * Neither the name of Freescale Semiconductor nor the<br>> - * names of its contributors may be used to endorse or promote products<br>> - * derived from this software without specific prior written permission.<br>> - *<br>> - *<br>> - * ALTERNATIVELY, this software may be distributed under the terms of the<br>> - * GNU General Public License ("GPL") as published by the Free Software<br>> - * Foundation, either version 2 of that License or (at your option) any<br>> - * later version.<br>> - *<br>> - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY<br>> - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED<br>> - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE<br>> - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY<br>> - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES<br>> - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;<br>> - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND<br>> - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT<br>> - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS<br>> - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.<br>> - */<br>> -<br>> -/dts-v1/;<br>> -<br>> -/ {<br>> - compatible = "fsl,P4080";<br>> - #address-cells = <2>;<br>> - #size-cells = <2>;<br>> - interrupt-parent = <&mpic>;<br>> -<br>> - aliases {<br>> - ccsr = &soc;<br>> - dcsr = &dcsr;<br>> -<br>> - serial0 = &serial0;<br>> - serial1 = &serial1;<br>> - serial2 = &serial2;<br>> - serial3 = &serial3;<br>> - pci0 = &pci0;<br>> - pci1 = &pci1;<br>> - pci2 = &pci2;<br>> - usb0 = &usb0;<br>> - usb1 = &usb1;<br>> - dma0 = &dma0;<br>> - dma1 = &dma1;<br>> - sdhc = &sdhc;<br>> - msi0 = &msi0;<br>> - msi1 = &msi1;<br>> - msi2 = &msi2;<br>> -<br>> - crypto = &crypto;<br>> - sec_jr0 = &sec_jr0;<br>> - sec_jr1 = &sec_jr1;<br>> - sec_jr2 = &sec_jr2;<br>> - sec_jr3 = &sec_jr3;<br>> - rtic_a = &rtic_a;<br>> - rtic_b = &rtic_b;<br>> - rtic_c = &rtic_c;<br>> - rtic_d = &rtic_d;<br>> - sec_mon = &sec_mon;<br>> -<br>> - rio0 = &rapidio0;<br>> - };<br>> -<br>> - cpus {<br>> - #address-cells = <1>;<br>> - #size-cells = <0>;<br>> -<br>> - cpu0: PowerPC,e500mc@0 {<br>> - device_type = "cpu";<br>> - reg = <0>;<br>> - next-level-cache = <&L2_0>;<br>> - L2_0: l2-cache {<br>> - next-level-cache = <&cpc>;<br>> - };<br>> - };<br>> - cpu1: PowerPC,e500mc@1 {<br>> - device_type = "cpu";<br>> - reg = <1>;<br>> - next-level-cache = <&L2_1>;<br>> - L2_1: l2-cache {<br>> - next-level-cache = <&cpc>;<br>> - };<br>> - };<br>> - cpu2: PowerPC,e500mc@2 {<br>> - device_type = "cpu";<br>> - reg = <2>;<br>> - next-level-cache = <&L2_2>;<br>> - L2_2: l2-cache {<br>> - next-level-cache = <&cpc>;<br>> - };<br>> - };<br>> - cpu3: PowerPC,e500mc@3 {<br>> - device_type = "cpu";<br>> - reg = <3>;<br>> - next-level-cache = <&L2_3>;<br>> - L2_3: l2-cache {<br>> - next-level-cache = <&cpc>;<br>> - };<br>> - };<br>> - cpu4: PowerPC,e500mc@4 {<br>> - device_type = "cpu";<br>> - reg = <4>;<br>> - next-level-cache = <&L2_4>;<br>> - L2_4: l2-cache {<br>> - next-level-cache = <&cpc>;<br>> - };<br>> - };<br>> - cpu5: PowerPC,e500mc@5 {<br>> - device_type = "cpu";<br>> - reg = <5>;<br>> - next-level-cache = <&L2_5>;<br>> - L2_5: l2-cache {<br>> - next-level-cache = <&cpc>;<br>> - };<br>> - };<br>> - cpu6: PowerPC,e500mc@6 {<br>> - device_type = "cpu";<br>> - reg = <6>;<br>> - next-level-cache = <&L2_6>;<br>> - L2_6: l2-cache {<br>> - next-level-cache = <&cpc>;<br>> - };<br>> - };<br>> - cpu7: PowerPC,e500mc@7 {<br>> - device_type = "cpu";<br>> - reg = <7>;<br>> - next-level-cache = <&L2_7>;<br>> - L2_7: l2-cache {<br>> - next-level-cache = <&cpc>;<br>> - };<br>> - };<br>> - };<br>> -<br>> - dcsr: dcsr@f00000000 {<br>> - #address-cells = <1>;<br>> - #size-cells = <1>;<br>> - compatible = "fsl,dcsr", "simple-bus";<br>> -<br>> - dcsr-epu@0 {<br>> - compatible = "fsl,dcsr-epu";<br>> - interrupts = <52 2 0 0<br>> - 84 2 0 0<br>> - 85 2 0 0>;<br>> - interrupt-parent = <&mpic>;<br>> - reg = <0x0 0x1000>;<br>> - };<br>> - dcsr-npc {<br>> - compatible = "fsl,dcsr-npc";<br>> - reg = <0x1000 0x1000 0x1000000 0x8000>;<br>> - };<br>> - dcsr-nxc@2000 {<br>> - compatible = "fsl,dcsr-nxc";<br>> - reg = <0x2000 0x1000>;<br>> - };<br>> - dcsr-corenet {<br>> - compatible = "fsl,dcsr-corenet";<br>> - reg = <0x8000 0x1000 0xB0000 0x1000>;<br>> - };<br>> - dcsr-dpaa@9000 {<br>> - compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";<br>> - reg = <0x9000 0x1000>;<br>> - };<br>> - dcsr-ocn@11000 {<br>> - compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";<br>> - reg = <0x11000 0x1000>;<br>> - };<br>> - dcsr-ddr@12000 {<br>> - compatible = "fsl,dcsr-ddr";<br>> - dev-handle = <&ddr1>;<br>> - reg = <0x12000 0x1000>;<br>> - };<br>> - dcsr-ddr@13000 {<br>> - compatible = "fsl,dcsr-ddr";<br>> - dev-handle = <&ddr2>;<br>> - reg = <0x13000 0x1000>;<br>> - };<br>> - dcsr-nal@18000 {<br>> - compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";<br>> - reg = <0x18000 0x1000>;<br>> - };<br>> - dcsr-rcpm@22000 {<br>> - compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";<br>> - reg = <0x22000 0x1000>;<br>> - };<br>> - dcsr-cpu-sb-proxy@40000 {<br>> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> - cpu-handle = <&cpu0>;<br>> - reg = <0x40000 0x1000>;<br>> - };<br>> - dcsr-cpu-sb-proxy@41000 {<br>> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> - cpu-handle = <&cpu1>;<br>> - reg = <0x41000 0x1000>;<br>> - };<br>> - dcsr-cpu-sb-proxy@42000 {<br>> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> - cpu-handle = <&cpu2>;<br>> - reg = <0x42000 0x1000>;<br>> - };<br>> - dcsr-cpu-sb-proxy@43000 {<br>> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> - cpu-handle = <&cpu3>;<br>> - reg = <0x43000 0x1000>;<br>> - };<br>> - dcsr-cpu-sb-proxy@44000 {<br>> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> - cpu-handle = <&cpu4>;<br>> - reg = <0x44000 0x1000>;<br>> - };<br>> - dcsr-cpu-sb-proxy@45000 {<br>> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> - cpu-handle = <&cpu5>;<br>> - reg = <0x45000 0x1000>;<br>> - };<br>> - dcsr-cpu-sb-proxy@46000 {<br>> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> - cpu-handle = <&cpu6>;<br>> - reg = <0x46000 0x1000>;<br>> - };<br>> - dcsr-cpu-sb-proxy@47000 {<br>> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";<br>> - cpu-handle = <&cpu7>;<br>> - reg = <0x47000 0x1000>;<br>> - };<br>> - };<br>> -<br>> - soc: soc@ffe000000 {<br>> - #address-cells = <1>;<br>> - #size-cells = <1>;<br>> - device_type = "soc";<br>> - compatible = "simple-bus";<br>> - ranges = <0x00000000 0xf 0xfe000000 0x1000000>;<br>> - reg = <0xf 0xfe000000 0 0x00001000>;<br>> -<br>> - soc-sram-error {<br>> - compatible = "fsl,soc-sram-error";<br>> - interrupts = <16 2 1 29>;<br>> - };<br>> -<br>> - corenet-law@0 {<br>> - compatible = "fsl,corenet-law";<br>> - reg = <0x0 0x1000>;<br>> - fsl,num-laws = <32>;<br>> - };<br>> -<br>> - ddr1: memory-controller@8000 {<br>> - compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";<br>> - reg = <0x8000 0x1000>;<br>> - interrupts = <16 2 1 23>;<br>> - };<br>> -<br>> - ddr2: memory-controller@9000 {<br>> - compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";<br>> - reg = <0x9000 0x1000>;<br>> - interrupts = <16 2 1 22>;<br>> - };<br>> -<br>> - cpc: l3-cache-controller@10000 {<br>> - compatible = "fsl,p4080-l3-cache-controller", "cache";<br>> - reg = <0x10000 0x1000<br>> - 0x11000 0x1000>;<br>> - interrupts = <16 2 1 27<br>> - 16 2 1 26>;<br>> - };<br>> -<br>> - corenet-cf@18000 {<br>> - compatible = "fsl,corenet-cf";<br>> - reg = <0x18000 0x1000>;<br>> - interrupts = <16 2 1 31>;<br>> - fsl,ccf-num-csdids = <32>;<br>> - fsl,ccf-num-snoopids = <32>;<br>> - };<br>> -<br>> - iommu@20000 {<br>> - compatible = "fsl,pamu-v1.0", "fsl,pamu";<br>> - reg = <0x20000 0x5000>;<br>> - interrupts = <<br>> - 24 2 0 0<br>> - 16 2 1 30>;<br>> - };<br>> -<br>> - mpic: pic@40000 {<br>> - clock-frequency = <0>;<br>> - interrupt-controller;<br>> - #address-cells = <0>;<br>> - #interrupt-cells = <4>;<br>> - reg = <0x40000 0x40000>;<br>> - compatible = "fsl,mpic", "chrp,open-pic";<br>> - device_type = "open-pic";<br>> - };<br>> -<br>> - msi0: msi@41600 {<br>> - compatible = "fsl,mpic-msi";<br>> - reg = <0x41600 0x200>;<br>> - msi-available-ranges = <0 0x100>;<br>> - interrupts = <<br>> - 0xe0 0 0 0<br>> - 0xe1 0 0 0<br>> - 0xe2 0 0 0<br>> - 0xe3 0 0 0<br>> - 0xe4 0 0 0<br>> - 0xe5 0 0 0<br>> - 0xe6 0 0 0<br>> - 0xe7 0 0 0>;<br>> - };<br>> -<br>> - msi1: msi@41800 {<br>> - compatible = "fsl,mpic-msi";<br>> - reg = <0x41800 0x200>;<br>> - msi-available-ranges = <0 0x100>;<br>> - interrupts = <<br>> - 0xe8 0 0 0<br>> - 0xe9 0 0 0<br>> - 0xea 0 0 0<br>> - 0xeb 0 0 0<br>> - 0xec 0 0 0<br>> - 0xed 0 0 0<br>> - 0xee 0 0 0<br>> - 0xef 0 0 0>;<br>> - };<br>> -<br>> - msi2: msi@41a00 {<br>> - compatible = "fsl,mpic-msi";<br>> - reg = <0x41a00 0x200>;<br>> - msi-available-ranges = <0 0x100>;<br>> - interrupts = <<br>> - 0xf0 0 0 0<br>> - 0xf1 0 0 0<br>> - 0xf2 0 0 0<br>> - 0xf3 0 0 0<br>> - 0xf4 0 0 0<br>> - 0xf5 0 0 0<br>> - 0xf6 0 0 0<br>> - 0xf7 0 0 0>;<br>> - };<br>> -<br>> - guts: global-utilities@e0000 {<br>> - compatible = "fsl,qoriq-device-config-1.0";<br>> - reg = <0xe0000 0xe00>;<br>> - fsl,has-rstcr;<br>> - #sleep-cells = <1>;<br>> - fsl,liodn-bits = <12>;<br>> - };<br>> -<br>> - pins: global-utilities@e0e00 {<br>> - compatible = "fsl,qoriq-pin-control-1.0";<br>> - reg = <0xe0e00 0x200>;<br>> - #sleep-cells = <2>;<br>> - };<br>> -<br>> - clockgen: global-utilities@e1000 {<br>> - compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";<br>> - reg = <0xe1000 0x1000>;<br>> - clock-frequency = <0>;<br>> - };<br>> -<br>> - rcpm: global-utilities@e2000 {<br>> - compatible = "fsl,qoriq-rcpm-1.0";<br>> - reg = <0xe2000 0x1000>;<br>> - #sleep-cells = <1>;<br>> - };<br>> -<br>> - sfp: sfp@e8000 {<br>> - compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0";<br>> - reg = <0xe8000 0x1000>;<br>> - };<br>> -<br>> - serdes: serdes@ea000 {<br>> - compatible = "fsl,p4080-serdes";<br>> - reg = <0xea000 0x1000>;<br>> - };<br>> -<br>> - dma0: dma@100300 {<br>> - #address-cells = <1>;<br>> - #size-cells = <1>;<br>> - compatible = "fsl,p4080-dma", "fsl,eloplus-dma";<br>> - reg = <0x100300 0x4>;<br>> - ranges = <0x0 0x100100 0x200>;<br>> - cell-index = <0>;<br>> - dma-channel@0 {<br>> - compatible = "fsl,p4080-dma-channel",<br>> - "fsl,eloplus-dma-channel";<br>> - reg = <0x0 0x80>;<br>> - cell-index = <0>;<br>> - interrupts = <28 2 0 0>;<br>> - };<br>> - dma-channel@80 {<br>> - compatible = "fsl,p4080-dma-channel",<br>> - "fsl,eloplus-dma-channel";<br>> - reg = <0x80 0x80>;<br>> - cell-index = <1>;<br>> - interrupts = <29 2 0 0>;<br>> - };<br>> - dma-channel@100 {<br>> - compatible = "fsl,p4080-dma-channel",<br>> - "fsl,eloplus-dma-channel";<br>> - reg = <0x100 0x80>;<br>> - cell-index = <2>;<br>> - interrupts = <30 2 0 0>;<br>> - };<br>> - dma-channel@180 {<br>> - compatible = "fsl,p4080-dma-channel",<br>> - "fsl,eloplus-dma-channel";<br>> - reg = <0x180 0x80>;<br>> - cell-index = <3>;<br>> - interrupts = <31 2 0 0>;<br>> - };<br>> - };<br>> -<br>> - dma1: dma@101300 {<br>> - #address-cells = <1>;<br>> - #size-cells = <1>;<br>> - compatible = "fsl,p4080-dma", "fsl,eloplus-dma";<br>> - reg = <0x101300 0x4>;<br>> - ranges = <0x0 0x101100 0x200>;<br>> - cell-index = <1>;<br>> - dma-channel@0 {<br>> - compatible = "fsl,p4080-dma-channel",<br>> - "fsl,eloplus-dma-channel";<br>> - reg = <0x0 0x80>;<br>> - cell-index = <0>;<br>> - interrupts = <32 2 0 0>;<br>> - };<br>> - dma-channel@80 {<br>> - compatible = "fsl,p4080-dma-channel",<br>> - "fsl,eloplus-dma-channel";<br>> - reg = <0x80 0x80>;<br>> - cell-index = <1>;<br>> - interrupts = <33 2 0 0>;<br>> - };<br>> - dma-channel@100 {<br>> - compatible = "fsl,p4080-dma-channel",<br>> - "fsl,eloplus-dma-channel";<br>> - reg = <0x100 0x80>;<br>> - cell-index = <2>;<br>> - interrupts = <34 2 0 0>;<br>> - };<br>> - dma-channel@180 {<br>> - compatible = "fsl,p4080-dma-channel",<br>> - "fsl,eloplus-dma-channel";<br>> - reg = <0x180 0x80>;<br>> - cell-index = <3>;<br>> - interrupts = <35 2 0 0>;<br>> - };<br>> - };<br>> -<br>> - spi@110000 {<br>> - #address-cells = <1>;<br>> - #size-cells = <0>;<br>> - compatible = "fsl,p4080-espi", "fsl,mpc8536-espi";<br>> - reg = <0x110000 0x1000>;<br>> - interrupts = <53 0x2 0 0>;<br>> - fsl,espi-num-chipselects = <4>;<br>> - };<br>> -<br>> - sdhc: sdhc@114000 {<br>> - compatible = "fsl,p4080-esdhc", "fsl,esdhc";<br>> - reg = <0x114000 0x1000>;<br>> - interrupts = <48 2 0 0>;<br>> - voltage-ranges = <3300 3300>;<br>> - sdhci,auto-cmd12;<br>> - clock-frequency = <0>;<br>> - };<br>> -<br>> - i2c@118000 {<br>> - #address-cells = <1>;<br>> - #size-cells = <0>;<br>> - cell-index = <0>;<br>> - compatible = "fsl-i2c";<br>> - reg = <0x118000 0x100>;<br>> - interrupts = <38 2 0 0>;<br>> - dfsrr;<br>> - };<br>> -<br>> - i2c@118100 {<br>> - #address-cells = <1>;<br>> - #size-cells = <0>;<br>> - cell-index = <1>;<br>> - compatible = "fsl-i2c";<br>> - reg = <0x118100 0x100>;<br>> - interrupts = <38 2 0 0>;<br>> - dfsrr;<br>> - };<br>> -<br>> - i2c@119000 {<br>> - #address-cells = <1>;<br>> - #size-cells = <0>;<br>> - cell-index = <2>;<br>> - compatible = "fsl-i2c";<br>> - reg = <0x119000 0x100>;<br>> - interrupts = <39 2 0 0>;<br>> - dfsrr;<br>> - };<br>> -<br>> - i2c@119100 {<br>> - #address-cells = <1>;<br>> - #size-cells = <0>;<br>> - cell-index = <3>;<br>> - compatible = "fsl-i2c";<br>> - reg = <0x119100 0x100>;<br>> - interrupts = <39 2 0 0>;<br>> - dfsrr;<br>> - };<br>> -<br>> - serial0: serial@11c500 {<br>> - cell-index = <0>;<br>> - device_type = "serial";<br>> - compatible = "ns16550";<br>> - reg = <0x11c500 0x100>;<br>> - clock-frequency = <0>;<br>> - interrupts = <36 2 0 0>;<br>> - };<br>> -<br>> - serial1: serial@11c600 {<br>> - cell-index = <1>;<br>> - device_type = "serial";<br>> - compatible = "ns16550";<br>> - reg = <0x11c600 0x100>;<br>> - clock-frequency = <0>;<br>> - interrupts = <36 2 0 0>;<br>> - };<br>> -<br>> - serial2: serial@11d500 {<br>> - cell-index = <2>;<br>> - device_type = "serial";<br>> - compatible = "ns16550";<br>> - reg = <0x11d500 0x100>;<br>> - clock-frequency = <0>;<br>> - interrupts = <37 2 0 0>;<br>> - };<br>> -<br>> - serial3: serial@11d600 {<br>> - cell-index = <3>;<br>> - device_type = "serial";<br>> - compatible = "ns16550";<br>> - reg = <0x11d600 0x100>;<br>> - clock-frequency = <0>;<br>> - interrupts = <37 2 0 0>;<br>> - };<br>> -<br>> - gpio0: gpio@130000 {<br>> - compatible = "fsl,p4080-gpio", "fsl,qoriq-gpio";<br>> - reg = <0x130000 0x1000>;<br>> - interrupts = <55 2 0 0>;<br>> - #gpio-cells = <2>;<br>> - gpio-controller;<br>> - };<br>> -<br>> - usb0: usb@210000 {<br>> - compatible = "fsl,p4080-usb2-mph",<br>> - "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";<br>> - reg = <0x210000 0x1000>;<br>> - #address-cells = <1>;<br>> - #size-cells = <0>;<br>> - interrupts = <44 0x2 0 0>;<br>> - };<br>> -<br>> - usb1: usb@211000 {<br>> - compatible = "fsl,p4080-usb2-dr",<br>> - "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";<br>> - reg = <0x211000 0x1000>;<br>> - #address-cells = <1>;<br>> - #size-cells = <0>;<br>> - interrupts = <45 0x2 0 0>;<br>> - };<br>> -<br>> - crypto: crypto@300000 {<br>> - compatible = "fsl,sec-v4.0";<br>> - #address-cells = <1>;<br>> - #size-cells = <1>;<br>> - reg = <0x300000 0x10000>;<br>> - ranges = <0 0x300000 0x10000>;<br>> - interrupt-parent = <&mpic>;<br>> - interrupts = <92 2 0 0>;<br>> -<br>> - sec_jr0: jr@1000 {<br>> - compatible = "fsl,sec-v4.0-job-ring";<br>> - reg = <0x1000 0x1000>;<br>> - interrupt-parent = <&mpic>;<br>> - interrupts = <88 2 0 0>;<br>> - };<br>> -<br>> - sec_jr1: jr@2000 {<br>> - compatible = "fsl,sec-v4.0-job-ring";<br>> - reg = <0x2000 0x1000>;<br>> - interrupt-parent = <&mpic>;<br>> - interrupts = <89 2 0 0>;<br>> - };<br>> -<br>> - sec_jr2: jr@3000 {<br>> - compatible = "fsl,sec-v4.0-job-ring";<br>> - reg = <0x3000 0x1000>;<br>> - interrupt-parent = <&mpic>;<br>> - interrupts = <90 2 0 0>;<br>> - };<br>> -<br>> - sec_jr3: jr@4000 {<br>> - compatible = "fsl,sec-v4.0-job-ring";<br>> - reg = <0x4000 0x1000>;<br>> - interrupt-parent = <&mpic>;<br>> - interrupts = <91 2 0 0>;<br>> - };<br>> -<br>> - rtic@6000 {<br>> - compatible = "fsl,sec-v4.0-rtic";<br>> - #address-cells = <1>;<br>> - #size-cells = <1>;<br>> - reg = <0x6000 0x100>;<br>> - ranges = <0x0 0x6100 0xe00>;<br>> -<br>> - rtic_a: rtic-a@0 {<br>> - compatible = "fsl,sec-v4.0-rtic-memory";<br>> - reg = <0x00 0x20 0x100 0x80>;<br>> - };<br>> -<br>> - rtic_b: rtic-b@20 {<br>> - compatible = "fsl,sec-v4.0-rtic-memory";<br>> - reg = <0x20 0x20 0x200 0x80>;<br>> - };<br>> -<br>> - rtic_c: rtic-c@40 {<br>> - compatible = "fsl,sec-v4.0-rtic-memory";<br>> - reg = <0x40 0x20 0x300 0x80>;<br>> - };<br>> -<br>> - rtic_d: rtic-d@60 {<br>> - compatible = "fsl,sec-v4.0-rtic-memory";<br>> - reg = <0x60 0x20 0x500 0x80>;<br>> - };<br>> - };<br>> - };<br>> -<br>> - sec_mon: sec_mon@314000 {<br>> - compatible = "fsl,sec-v4.0-mon";<br>> - reg = <0x314000 0x1000>;<br>> - interrupt-parent = <&mpic>;<br>> - interrupts = <93 2 0 0>;<br>> - };<br>> - };<br>> -<br>> - rapidio0: rapidio@ffe0c0000 {<br>> - #address-cells = <2>;<br>> - #size-cells = <2>;<br>> - compatible = "fsl,rapidio-delta";<br>> - interrupts = <<br>> - 16 2 1 11 /* err_irq */<br>> - 56 2 0 0 /* bell_outb_irq */<br>> - 57 2 0 0 /* bell_inb_irq */<br>> - 60 2 0 0 /* msg1_tx_irq */<br>> - 61 2 0 0 /* msg1_rx_irq */<br>> - 62 2 0 0 /* msg2_tx_irq */<br>> - 63 2 0 0>; /* msg2_rx_irq */<br>> - };<br>> -<br>> - localbus@ffe124000 {<br>> - compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";<br>> - interrupts = <25 2 0 0>;<br>> - #address-cells = <2>;<br>> - #size-cells = <1>;<br>> - };<br>> -<br>> - pci0: pcie@ffe200000 {<br>> - compatible = "fsl,p4080-pcie";<br>> - device_type = "pci";<br>> - #size-cells = <2>;<br>> - #address-cells = <3>;<br>> - bus-range = <0x0 0xff>;<br>> - clock-frequency = <0x1fca055>;<br>> - fsl,msi = <&msi0>;<br>> - interrupts = <16 2 1 15>;<br>> - pcie@0 {<br>> - reg = <0 0 0 0 0>;<br>> - #interrupt-cells = <1>;<br>> - #size-cells = <2>;<br>> - #address-cells = <3>;<br>> - device_type = "pci";<br>> - interrupts = <16 2 1 15>;<br>> - interrupt-map-mask = <0xf800 0 0 7>;<br>> - interrupt-map = <<br>> - /* IDSEL 0x0 */<br>> - 0000 0 0 1 &mpic 40 1 0 0<br>> - 0000 0 0 2 &mpic 1 1 0 0<br>> - 0000 0 0 3 &mpic 2 1 0 0<br>> - 0000 0 0 4 &mpic 3 1 0 0<br>> - >;<br>> - };<br>> - };<br>> -<br>> - pci1: pcie@ffe201000 {<br>> - compatible = "fsl,p4080-pcie";<br>> - device_type = "pci";<br>> - #size-cells = <2>;<br>> - #address-cells = <3>;<br>> - bus-range = <0 0xff>;<br>> - clock-frequency = <0x1fca055>;<br>> - fsl,msi = <&msi1>;<br>> - interrupts = <16 2 1 14>;<br>> - pcie@0 {<br>> - reg = <0 0 0 0 0>;<br>> - #interrupt-cells = <1>;<br>> - #size-cells = <2>;<br>> - #address-cells = <3>;<br>> - device_type = "pci";<br>> - interrupts = <16 2 1 14>;<br>> - interrupt-map-mask = <0xf800 0 0 7>;<br>> - interrupt-map = <<br>> - /* IDSEL 0x0 */<br>> - 0000 0 0 1 &mpic 41 1 0 0<br>> - 0000 0 0 2 &mpic 5 1 0 0<br>> - 0000 0 0 3 &mpic 6 1 0 0<br>> - 0000 0 0 4 &mpic 7 1 0 0<br>> - >;<br>> - };<br>> - };<br>> -<br>> - pci2: pcie@ffe202000 {<br>> - compatible = "fsl,p4080-pcie";<br>> - device_type = "pci";<br>> - #size-cells = <2>;<br>> - #address-cells = <3>;<br>> - bus-range = <0x0 0xff>;<br>> - clock-frequency = <0x1fca055>;<br>> - fsl,msi = <&msi2>;<br>> - interrupts = <16 2 1 13>;<br>> - pcie@0 {<br>> - reg = <0 0 0 0 0>;<br>> - #interrupt-cells = <1>;<br>> - #size-cells = <2>;<br>> - #address-cells = <3>;<br>> - device_type = "pci";<br>> - interrupts = <16 2 1 13>;<br>> - interrupt-map-mask = <0xf800 0 0 7>;<br>> - interrupt-map = <<br>> - /* IDSEL 0x0 */<br>> - 0000 0 0 1 &mpic 42 1 0 0<br>> - 0000 0 0 2 &mpic 9 1 0 0<br>> - 0000 0 0 3 &mpic 10 1 0 0<br>> - 0000 0 0 4 &mpic 11 1 0 0<br>> - >;<br>> - };<br>> - };<br>> -};<br>> -- <br>> 1.7.3.4<br>> <br>> <br>> <br>> ------------------------------<br>> <br>> _______________________________________________<br>> Linuxppc-dev mailing list<br>> Linuxppc-dev@lists.ozlabs.org<br>> https://lists.ozlabs.org/listinfo/linuxppc-dev<br>> <br>> End of Linuxppc-dev Digest, Vol 87, Issue 61<br>> ********************************************<br></div> </div></body>
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