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<title>Re: [PATCH] Add Freescale CodeWarrior debug support for kernel</title>
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/* Style Definitions */
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font-size:12.0pt;
font-family:"Times New Roman","serif";}
a:link, span.MsoHyperlink
{mso-style-priority:99;
color:blue;
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margin:1.0in 1.0in 1.0in 1.0in;}
div.WordSection1
{page:WordSection1;}
-->
</style>
<!--[if gte mso 9]><xml>
<o:shapedefaults v:ext="edit" spidmax="1026" />
</xml><![endif]--><!--[if gte mso 9]><xml>
<o:shapelayout v:ext="edit">
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</o:shapelayout></xml><![endif]-->
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<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'>Hello Kumar,<o:p></o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'><o:p> </o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'>These changes were added so that the CW debugger would be able
to debug all code in head_fsl_booke.S . I’m not sure why there was an
assumption about TLB entry #8, I guess there was some TLB mapping remaining in
entry 8 (not sure who set up this mapping though) and some code was added to
mark it invalid so that the debugger would not try to take it into
consideration for converting virtual addresses. <o:p></o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'><o:p> </o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'>Adrian<o:p></o:p></span></p>
<p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";
color:#1F497D'><o:p> </o:p></span></p>
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<p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span
style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> Kumar Gala
[mailto:galak@kernel.crashing.org] <br>
<b>Sent:</b> Thursday, November 11, 2010 1:51 PM<br>
<b>To:</b> Zang Roy-R61911<br>
<b>Cc:</b> linuxppc-dev@ozlabs.org; Bogdan Adrian-Catalin-B15061<br>
<b>Subject:</b> Re: [PATCH] Add Freescale CodeWarrior debug support for kernel<o:p></o:p></span></p>
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<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p style='margin-bottom:12.0pt'><span style='font-size:10.0pt'>On Oct 28, 2010,
at 3:50 AM, Roy Zang wrote:<br>
<br>
> CodeWarrior is popular embedded tools to support debugging Powerpc.<br>
> This patch adds Freescale CodeWarrior debug support for Linux kernel on<br>
> 85xx/QorIQ platform.<br>
><br>
> Signed-off-by: Bogdan Adrin <drian.bogdan@freescale.com><br>
> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com><br>
> ---<br>
>
arch/powerpc/Kconfig.debug
| 8 ++++++++<br>
>
arch/powerpc/Makefile
| 5 +++++<br>
> arch/powerpc/include/asm/reg_booke.h
| 4 ++++<br>
> arch/powerpc/kernel/fsl_booke_entry_mapping.S | 3 +++<br>
>
arch/powerpc/kernel/head_fsl_booke.S
| 11 +++++++++--<br>
>
arch/powerpc/kernel/idle.c
| 5 ++++-<br>
> 6 files changed, 33 insertions(+), 3 deletions(-)<br>
><br>
> diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug<br>
> index 2d38a50..eedd2ac 100644<br>
> --- a/arch/powerpc/Kconfig.debug<br>
> +++ b/arch/powerpc/Kconfig.debug<br>
> @@ -153,6 +153,14 @@ config BDI_SWITCH<br>
> Unless you are intending to debug
the kernel with one of these<br>
> machines, say N here.<br>
><br>
> +config DEBUG_CODEWARRIOR<br>
> + bool "Include CodeWarrior kernel
debugging"<br>
> + depends on DEBUG_KERNEL && PPC32<br>
> + help<br>
> + Say Y here to include CodeWarrior kernel
debugging option<br>
> + Unless you are intending to debug the
kernel with one of these<br>
> + machines, say N here.<br>
> +<br>
> config BOOTX_TEXT<br>
> bool "Support for early boot text
console (BootX or OpenFirmware only)"<br>
> depends on PPC_OF && PPC_BOOK3S<br>
> diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile<br>
> index b7212b6..d3050e6 100644<br>
> --- a/arch/powerpc/Makefile<br>
> +++ b/arch/powerpc/Makefile<br>
> @@ -121,6 +121,11 @@ KBUILD_CFLAGS += $(call
cc-option,-fno-dwarf2-cfi-asm)<br>
> # often slow when they are implemented at all<br>
> KBUILD_CFLAGS += -mno-string<br>
><br>
> +ifeq ($(CONFIG_DEBUG_CODEWARRIOR),y)<br>
> +CFLAGS += -g2 -gdwarf-2<br>
> +AFLAGS_KERNEL += -Wa,-gdwarf2<br>
> +endif<br>
> +<br>
> ifeq ($(CONFIG_6xx),y)<br>
> KBUILD_CFLAGS += -mcpu=powerpc<br>
> endif<br>
> diff --git a/arch/powerpc/include/asm/reg_booke.h
b/arch/powerpc/include/asm/reg_booke.h<br>
> index 667a498..ac65fcd 100644<br>
> --- a/arch/powerpc/include/asm/reg_booke.h<br>
> +++ b/arch/powerpc/include/asm/reg_booke.h<br>
> @@ -35,7 +35,11 @@<br>
> #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE)<br>
> #define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE)<br>
> #else<br>
> +#if defined(CONFIG_DEBUG_CODEWARRIOR)<br>
> +#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_CE|MSR_DE)<br>
> +#else<br>
> #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_CE)<br>
> +#endif<br>
> #define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE)<br>
> #endif<br>
><br>
> diff --git a/arch/powerpc/kernel/fsl_booke_entry_mapping.S
b/arch/powerpc/kernel/fsl_booke_entry_mapping.S<br>
> index a92c79b..9102aa7 100644<br>
> --- a/arch/powerpc/kernel/fsl_booke_entry_mapping.S<br>
> +++ b/arch/powerpc/kernel/fsl_booke_entry_mapping.S<br>
> @@ -116,6 +116,9 @@ skpinv: addi r6,r6,1
/* Increment */<br>
><br>
> xori r6,r4,1<br>
> slwi r6,r6,5
/* setup new context with other
address space */<br>
> +#if defined(CONFIG_DEBUG_CODEWARRIOR)<br>
> + ori r6, r6,
0x200 /* enable DE bit for MSR */<br>
<br>
Can we use MSR_DE@l instead of 0x200<br>
<br>
> +#endif<br>
> bl
1f /*
Find our address */<br>
> 1: mflr r9<br>
> rlwimi r7,r9,0,20,31<br>
> diff --git a/arch/powerpc/kernel/head_fsl_booke.S
b/arch/powerpc/kernel/head_fsl_booke.S<br>
> index 529b817..9962d09 100644<br>
> --- a/arch/powerpc/kernel/head_fsl_booke.S<br>
> +++ b/arch/powerpc/kernel/head_fsl_booke.S<br>
> @@ -21,7 +21,7 @@<br>
> *
debbie_chu@mvista.com<br>
> * Copyright 2002-2004 MontaVista Software, Inc.<br>
> * PowerPC 44x support, Matt Porter
<mporter@kernel.crashing.org><br>
> - * Copyright 2004 Freescale Semiconductor, Inc<br>
> + * Copyright 2004,2010 Freescale Semiconductor, Inc<br>
> * PowerPC e500 modifications, Kumar Gala
<galak@kernel.crashing.org><br>
> *<br>
> * This program is free software; you can redistribute it
and/or modify it<br>
> @@ -135,7 +135,7 @@ _ENTRY(__early_start)<br>
> mtspr SPRN_HID0, r2<br>
> #endif<br>
><br>
> -#if !defined(CONFIG_BDI_SWITCH)<br>
> +#if !defined(CONFIG_BDI_SWITCH) &&
!defined(CONFIG_DEBUG_CODEWARRIOR)<br>
> /*<br>
> * The Abatron BDI JTAG debugger does
not tolerate others<br>
> * mucking with the debug registers.<br>
> @@ -197,6 +197,13 @@ _ENTRY(__early_start)<br>
> /*<br>
> * Decide what sort of machine this is and initialize the MMU.<br>
> */<br>
> +#if defined(CONFIG_DEBUG_CODEWARRIOR)<br>
> + lis r10, 0x1008 /* clear
the V bit from the L2MMU_CAM8 register */<br>
<br>
why do we need this code? It seems pretty fragile if its assuming
something about TLB entry #8<br>
<br>
> + mtspr SPRN_MAS0, r10<br>
> + lis r10, 0x0<br>
> + mtspr SPRN_MAS1, r10<br>
> + tlbwe<br>
> +#endif<br>
> mr r3,r31<br>
> mr r4,r30<br>
> mr r5,r29<br>
> diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c<br>
> index 39a2baa..83fb019 100644<br>
> --- a/arch/powerpc/kernel/idle.c<br>
> +++ b/arch/powerpc/kernel/idle.c<br>
> @@ -73,8 +73,11 @@ void cpu_idle(void)<br>
>
stop_critical_timings();<br>
><br>
>
/* check again after disabling irqs
*/<br>
> -
if (!need_resched() &&
!cpu_should_die())<br>
> +
if (!need_resched() &&
!cpu_should_die()) {<br>
> +#if !defined(CONFIG_DEBUG_CODEWARRIOR)<br>
>
ppc_md.power_save();<br>
> +#endif<br>
> +
}<br>
><br>
>
start_critical_timings();<br>
><br>
> --<br>
> 1.5.6.5<br>
><br>
<br>
</span><o:p></o:p></p>
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