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<p class=MsoNormal>I have a system with an SGMII interface on an MPC8536E,
attached to a Marvel 88E6152 Ethernet switch chip. I can access Ethernet
from u-boot, if I initially configure the MII “phy” and the switch
port PHY to disable auto-negotiation and assert link up. The link speed
is 10Mbps and it is half-duplex. When u-boot starts, reports that it didn’t
recognize a PHY 0xFFFF id, and says it will assume a generic phy.<o:p></o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal>Obviously, I’d like to run without having to manually
configure and have it run at 1gbps, full-duplex.<o:p></o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal>However, I am not able to get linux to recognize the device –
it reports that a ten-bit interface (TBI) is required for SGMII and it can’t
find one. I have a tbi-phy entry in the device-tree file. Here’s
the relevant snippet:<o:p></o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal>
mdio@24520 {<o:p></o:p></p>
<p class=MsoNormal>
#address-cells = <1>;<o:p></o:p></p>
<p class=MsoNormal>
#size-cells = <0>;<o:p></o:p></p>
<p class=MsoNormal>
compatible = "fsl,gianfar-tbi";<o:p></o:p></p>
<p class=MsoNormal>
reg = <0x24520 0x20>;<o:p></o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal> phy0:
ethernet-phy@0x10 {<o:p></o:p></p>
<p class=MsoNormal>
interrupt-parent = <&mpic>;<o:p></o:p></p>
<p class=MsoNormal>
interrupts = <10 0x1>;<o:p></o:p></p>
<p class=MsoNormal>
reg = <0x10>;<o:p></o:p></p>
<p class=MsoNormal>
device_type = "ethernet-phy";<o:p></o:p></p>
<p class=MsoNormal>
};<o:p></o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal>
tbi0: tbi-phy@4 {<o:p></o:p></p>
<p class=MsoNormal>
reg = <0x4>;<o:p></o:p></p>
<p class=MsoNormal>
device_type = "tbi-phy";<o:p></o:p></p>
<p class=MsoNormal>
};<o:p></o:p></p>
<p class=MsoNormal>
};<o:p></o:p></p>
<p class=MsoNormal> enet0:
ethernet@24000 {<o:p></o:p></p>
<p class=MsoNormal> cell-index
= <0>;<o:p></o:p></p>
<p class=MsoNormal> device_type
= "network";<o:p></o:p></p>
<p class=MsoNormal> model
= "eTSEC";<o:p></o:p></p>
<p class=MsoNormal> compatible
= "gianfar";<o:p></o:p></p>
<p class=MsoNormal> reg
= <0x24000 0x1000>;<o:p></o:p></p>
<p class=MsoNormal> local-mac-address
= [ 00 00 00 00 00 00 ];<o:p></o:p></p>
<p class=MsoNormal> interrupts
= <29 2 30 2 34 2>;<o:p></o:p></p>
<p class=MsoNormal> interrupt-parent
= <&mpic>;<o:p></o:p></p>
<p class=MsoNormal> tbi-handle
= <&tbi0>;<o:p></o:p></p>
<p class=MsoNormal> phy-handle
= <&phy0>;<o:p></o:p></p>
<p class=MsoNormal> phy-connection-type
= "sgmii";<o:p></o:p></p>
<p class=MsoNormal> fsl,magic-packet;<o:p></o:p></p>
<p class=MsoNormal> fsl,wake-on-filer;<o:p></o:p></p>
<p class=MsoNormal> };<o:p></o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal>The processor has an MDIO interface to the switch. The
switch port PHYs are 0x10, 0x11, 0x12, 0x13, 0x17, and 0x19. I picked 4 for the
TBI arbitrarily (but seeking to avoid conflicting a PHY address).<o:p></o:p></p>
<p class=MsoNormal><o:p> </o:p></p>
<p class=MsoNormal>Any hints will be appreciated.<o:p></o:p></p>
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