Eric,<br>
<br>
1. I did try building with MDS configuration.<br>
2. Removed BCSR section<br>
3. Set u-boot environment variable.<br>
<br>
The code boots up in the MPC8349 reference platform and not in the custom board.<br>
Also I am wondering why the cuImage would not give out any serial
output even, whereas I do see serial out with DTB file passed from
u-boot?!!<br>
<br>
<br>
Screen-shot:<br>
==========<br>
Bytes transferred = 12288 (3000 hex)<br>
SC3000&gt; bootm 0x2000000 - 0x3000000<br>
## Booting image at 02000000 ...<br>
   Image Name:   Linux-2.6.27.18<br>
   Created:      2009-12-09  21:57:32 UTC<br>
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)<br>
   Data Size:    1464261 Bytes =  1.4 MB<br>
   Load Address: 00000000<br>
   Entry Point:  00000000<br>
   Verifying Checksum ... OK<br>
   Uncompressing Kernel Image ... OK<br>
## Current stack ends at 0x0FF9BD48 =&gt; set upper limit to 0x00800000<br>
## cmdline at 0x007FFF00 ... 0x007FFF25<br>
bd address  = 0x0FF9BFC4<br>
memstart    = 0x00000000<br>
memsize     = 0x10000000<br>
flashstart  = 0xFE000000<br>
flashsize   = 0x00080000<br>
flashoffset = 0x00034000<br>
sramstart   = 0x00000000<br>
sramsize    = 0x00000000<br>
bootflags   = 0x00000001<br>
intfreq     = 399.999 MHz<br>
busfreq     = 266.666 MHz<br>
ethaddr     = 00:E0:0C:00:8C:01<br>
IP addr     = 192.168.201.199<br>
baudrate    = 115200 bps<br>
Skipping initrd<br>
   Booting using the fdt at 0x3000000<br>
No initrd<br>
## device tree at 0x03000000 ... 0x03002FFF (len=12288=0x3000)<br>
   Loading Device Tree to 007fc000, end 007fefff ... OK<br>
Updating property &#39;/soc8349@e0000000/ethernet@24000/mac-address&#39;
=  00 e0 0c 00 81Updating property
&#39;/soc8349@e0000000/ethernet@24000/local-mac-address&#39; =  00 e0
01Updating property &#39;timebase-frequency&#39; =  03 f9 40 aa<br>
Updating property &#39;bus-frequency&#39; =  0f e5 02 a8<br>
Updating property &#39;clock-frequency&#39; =  17 d7 83 fc<br>
Updating property &#39;bus-frequency&#39; =  0f e5 02 a8<br>
Updating property &#39;clock-frequency&#39; =  0f e5 02 a8<br>
## Transferring control to Linux (at address 00000000) ...<br>
Using MPC834x MDS machine description<br>
Linux version 2.6.27.18 (root@localhost.localdomain) (gcc version
4.1.2) #4 Wed D9Found legacy serial port 0 for
/soc8349@e0000000/serial@4500<br>
  mem=e0004500, taddr=e0004500, irq=0, clk=266666664, speed=0<br>
Found legacy serial port 1 for /soc8349@e0000000/serial@4600<br>
  mem=e0004600, taddr=e0004600, irq=0, clk=266666664, speed=0<br>
console [udbg0] enabled<br>
setup_arch: bootmem<br>
mpc834x_mds_setup_arch()<br>
Found MPC83xx PCI host bridge at 0x00000000e0008500. Firmware bus number: 0-&gt;0<br>
PCI host bridge /pci@e0008500 (primary) ranges:<br>
 MEM 0x0000000090000000..0x000000009fffffff -&gt; 0x0000000090000000<br>
 MEM 0x0000000080000000..0x000000008fffffff -&gt; 0x0000000080000000 Prefetch<br>
  IO 0x00000000e2000000..0x00000000e20fffff -&gt; 0x0000000000000000<br>
Found MPC83xx PCI host bridge at 0x00000000e0008600. Firmware bus number: 0-&gt;0<br>
PCI host bridge /pci@e0008600  ranges:<br>
 MEM 0x00000000b0000000..0x00000000bfffffff -&gt; 0x00000000b0000000<br>
 MEM 0x00000000a0000000..0x00000000afffffff -&gt; 0x00000000a0000000 Prefetch<br>
  IO 0x00000000e2100000..0x00000000e21fffff -&gt; 0x0000000000000000<br>
arch: exit<br>
Top of RAM: 0x10000000, Total RAM: 0x10000000<br>
Memory hole size: 0MB<br>
Zone PFN ranges:<br>
  DMA      0x00000000 -&gt; 0x00010000<br>
  Normal   0x00010000 -&gt; 0x00010000<br>
Movable zone start PFN for each node<br>
early_node_map[1] active PFN ranges<br>
    0: 0x00000000 -&gt; 0x00010000<br>
On node 0 totalpages: 65536<br>
free_area_init_node: node 0, pgdat c02ed470, node_mem_map c030f180<br>
  DMA zone: 65024 pages, LIFO batch:15<br>
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 65024<br>
Kernel command line: root=/dev/ram rw console=ttyS0,115200<br>
IPIC (128 IRQ sources) at fddfa700<br>
PID hash table entries: 1024 (order: 10, 4096 bytes)<br>
time_init: decrementer frequency = 66.666666 MHz<br>
time_init: processor frequency   = 399.999996 MHz<br>
clocksource: timebase mult[3c00001] shift[22] registered<br>
clockevent: decrementer mult[1111] shift[16] cpu[0]<br>
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)<br>
<br>
<br><br><div><span class="gmail_quote">On 12/9/09, <b class="gmail_sendername">Lee, Eric</b> &lt;<a href="mailto:eric.lee@hp.com">eric.lee@hp.com</a>&gt; wrote:</span><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">









<div link="blue" vlink="purple" lang="EN-US">

<div>

<p class="MsoNormal"><span style="font-size: 11pt; color: rgb(31, 73, 125);">two things; I had better luck with the mpc8349mds (? don’t
remember exact file name) dts as opposed to the itx.  I had to remove the bcsr
section or else the kernel hung during initialization .  also, your u-boot is
not passing the correct kernel commandline:</span></p>

<p class="MsoNormal"><span style="font-size: 11pt; color: rgb(31, 73, 125);"> </span></p>

<p class="MsoNormal"><span style="font-size: 11pt; color: rgb(31, 73, 125);">“</span>Kernel command line: root=/dev/nfs rw
nfsroot=192.168.200.230:/nfsroot/rootfs i0IPIC (128 IRQ sources) at fdffc700”</p>

<p class="MsoNormal"> </p>

<p class="MsoNormal">you’re trying to run a ramdisk and with tty I expect:</p>

<p class="MsoNormal"> </p>

<p class="MsoNormal"><span style="font-size: 11pt; color: rgb(31, 73, 125);">“root=/dev/ram rw console=ttyS0,115200  “</span></p>

<p class="MsoNormal"><span style="font-size: 11pt; color: rgb(31, 73, 125);"> </span></p>

<p class="MsoNormal"><span style="font-size: 11pt; color: rgb(31, 73, 125);">check your environment variable bootargs in u-boot</span></p>

<p class="MsoNormal"><span style="font-size: 11pt; color: rgb(31, 73, 125);"> </span></p>

<p class="MsoNormal"><span style="font-size: 11pt; color: rgb(31, 73, 125);"> </span></p>

<p class="MsoNormal"><span style="font-size: 11pt; color: rgb(31, 73, 125);"> </span></p>

<div style="border-style: solid none none; border-color: rgb(181, 196, 223) -moz-use-text-color -moz-use-text-color; border-width: 1pt medium medium; padding: 3pt 0in 0in;">

<p class="MsoNormal"><b><span style="font-size: 10pt;">From:</span></b><span style="font-size: 10pt;"> Junita Ajith
[mailto:<a href="mailto:ajijuni@gmail.com" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">ajijuni@gmail.com</a>] <br>
<b>Sent:</b> Wednesday, December 09, 2009 10:58 AM<br>
<b>To:</b> Lee, Eric<br>
<b>Cc:</b> <a href="mailto:Linuxppc-dev@lists.ozlabs.org" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">Linuxppc-dev@lists.ozlabs.org</a><br>
<b>Subject:</b> dts file for MPC8343EA - cuImage doesn&#39;t boot , but uImage with
DTS shows serial output</span></p>

</div><div><span class="e" id="q_12574a4fcec7cc7f_1">

<p class="MsoNormal"> </p>

<p class="MsoNormal" style="margin-bottom: 12pt;">Hi Eric,<br>
<br>
I am building the linux kernel V-2.6.27  based on MPC8349miTXGP dts file.<br>
I am still not able to boot the cuImage.<br>
<br>
But, I see serial outuput from kernel when I try to boot with &lt;kernel&gt;
&lt;ramdisk&gt; &lt;dtb file&gt;<br>
<br>
Still the kernel hangs after &quot;Dentry cache hash table entries: 32768
(order: 5, 131072 bytes)&quot;.<br>
<br>
Any clues ..?? We have DDR2 in this board and we are initializing it in U-Boot.
<br>
<br>
Please find the screen dump below:<br>
<br>
Thanks,<br>
Junita<br>
<br>
Screen shot:<br>
===========<br>
u-boot&gt; bootm 0x2000000 0x3000000 0x4000000<br>
## Booting image at 02000000 ...<br>
   Image Name:   Linux-2.6.27.18-svn52-dirty8<br>
   Created:      2009-12-08  23:49:28
UTC<br>
   Image Type:   PowerPC Linux Kernel Image (gzip
compressed)<br>
   Data Size:    1416039 Bytes =  1.4 MB<br>
   Load Address: 00000000<br>
   Entry Point:  00000000<br>
   Verifying Checksum ... OK<br>
   Uncompressing Kernel Image ... OK<br>
## Current stack ends at 0x0FF9BD48 =&gt; set upper limit to 0x00800000<br>
## cmdline at 0x007FFF00 ... 0x007FFFA6<br>
bd address  = 0x0FF9BFC4<br>
memstart    = 0x00000000<br>
memsize     = 0x10000000<br>
flashstart  = 0xFE000000<br>
flashsize   = 0x00080000<br>
flashoffset = 0x00034000<br>
sramstart   = 0x00000000<br>
sramsize    = 0x00000000<br>
bootflags   = 0x00000001<br>
intfreq     = 399.999 MHz<br>
busfreq     = 266.666 MHz<br>
ethaddr     = 00:E0:0C:00:8C:01<br>
IP addr     = 192.168.201.199<br>
baudrate    = 115200 bps<br>
Not skipping initrd<br>
## Loading RAMDisk Image at 03000000 ...<br>
   Image Name:   uboot ext2 ramdisk rootfs<br>
   Created:      2009-10-30  20:15:22
UTC<br>
   Image Type:   PowerPC Linux RAMDisk Image (gzip
compressed)<br>
   Data Size:    3889103 Bytes =  3.7 MB<br>
   Load Address: 00000000<br>
   Entry Point:  00000000<br>
   Verifying Checksum ... OK<br>
   Booting using the fdt at 0x4000000<br>
## initrd at 0x03000040 ... 0x033B580E (len=3889103=0x3B57CF)<br>
   Loading Ramdisk to 0fbe5000, end 0ff9a7cf ... OK<br>
## device tree at 0x04000000 ... 0x04002FFF (len=12288=0x3000)<br>
   Loading Device Tree to 007fc000, end 007fefff ... OK<br>
Updating property &#39;/soc8349@e0000000/ethernet@24000/mac-address&#39; =  00 e0
0c 001Updating property &#39;/soc8349@e0000000/ethernet@24000/local-mac-address&#39;
=  00 e01Updating property &#39;timebase-frequency&#39; =  03 f9 40 aa<br>
Updating property &#39;bus-frequency&#39; =  0f e5 02 a8<br>
Updating property &#39;clock-frequency&#39; =  17 d7 83 fc<br>
Updating property &#39;bus-frequency&#39; =  0f e5 02 a8<br>
Updating property &#39;clock-frequency&#39; =  0f e5 02 a8<br>
## Transferring control to Linux (at address 00000000) ...<br>
Using MPC834x ITX machine description<br>
Linux version 2.6.27.18-svn52-dirty8 (root@localhost.localdomain) (gcc version
9Found initrd at 0xcfbe5000:0xcff9a7cf<br>
console [udbg0] enabled<br>
setup_arch: bootmem<br>
mpc834x_itx_setup_arch()<br>
arch: exit<br>
Zone PFN ranges:<br>
  DMA      0x00000000 -&gt; 0x00010000<br>
  Normal   0x00010000 -&gt; 0x00010000<br>
Movable zone start PFN for each node<br>
early_node_map[1] active PFN ranges<br>
    0: 0x00000000 -&gt; 0x00010000<br>
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 65024<br>
Kernel command line: root=/dev/nfs rw nfsroot=192.168.200.230:/nfsroot/rootfs
i0IPIC (128 IRQ sources) at fdffc700<br>
PID hash table entries: 1024 (order: 10, 4096 bytes)<br>
clocksource: timebase mult[3c00001] shift[22] registered<br>
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)<br>
<br>
<br>
<br>
<br>
</p>

<div>

<p class="MsoNormal"><span>On 12/9/09, <b>Lee, Eric</b> &lt;<a href="mailto:eric.lee@hp.com" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">eric.lee@hp.com</a>&gt; wrote:</span></p>

<p class="MsoNormal">I would probably remove the bcsr region.  this was
some cpld I believe on a reference board.  with this dts it&#39;ll try to
write to some hardware registers that do not exist or are not mapped to the
same area.<br>
<br>
<br>
<br>
<br>
-----Original Message-----<br>
From: linuxppc-dev-bounces+eric.lee=<a href="http://hp.com" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">hp.com</a>@<a href="http://lists.ozlabs.org" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">lists.ozlabs.org</a> [mailto:<a href="mailto:linuxppc-dev-bounces%2Beric.lee" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">linuxppc-dev-bounces+eric.lee</a>=<a href="http://hp.com" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">hp.com</a>@<a href="http://lists.ozlabs.org" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">lists.ozlabs.org</a>]
On Behalf Of <a href="mailto:ajijuni@gmail.com" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">ajijuni@gmail.com</a><br>
Sent: Sunday, December 06, 2009 11:41 PM<br>
To: <a href="mailto:Linuxppc-dev@lists.ozlabs.org" target="_blank" onclick="return top.js.OpenExtLink(window,event,this)">Linuxppc-dev@lists.ozlabs.org</a><br>
Subject: dts file for MPC8343EA<br>
<br>
Hi<br>
<br>
We have an MPC8343EA based custom board.<br>
<br>
I am not able to get Linux up and running in this. No serial output to debug
further.<br>
  U-boot shows correct &#39;bdinfo&#39; &amp; &#39;clocks&#39; output.<br>
inux hangs at machine_probe.<br>
<br>
<br>
I doubt the DTS file in Linux. anyone has DTS file for MPC8343??<br>
<br>
u-boot version - 1.3.2<br>
linux-2.6.27<br>
The board base files are drived from MPC8349Imtx-GP since we have the reference
board in which we tested the linux image.<br>
<br>
My current DTS file<br>
/dts-v1/;<br>
<br>
/ {<br>
        model = &quot;MPC8343&quot;;<br>
        compatible =
&quot;MPC8349EMDS&quot;, &quot;MPC834xMDS&quot;, &quot;MPC83xxMDS&quot;;<br>
        linux,phandle = &lt;0x100&gt;;<br>
        #size-cells = &lt;0x1&gt;;<br>
        #address-cells = &lt;0x1&gt;;<br>
<br>
        aliases {<br>
                ethernet0
= &amp;enet0;<br>
                ethernet1
= &amp;enet1;<br>
                serial0
= &amp;serial0;<br>
                serial1
= &amp;serial1;<br>
                pci0
= &amp;pci0;<br>
                pci1
= &amp;pci1;<br>
        };<br>
         cpus {<br>
                linux,phandle
= &lt;0x200&gt;;<br>
                #cpus
= &lt;0x1&gt;;<br>
                #address-cells
= &lt;1&gt;;<br>
                #size-cells
= &lt;0&gt;;<br>
<br>
  PowerPC,8343EA@0 {<br>                        device_type
= &quot;cpu&quot;;<br>
                        reg
= &lt;0x0&gt;;<br>
                        d-cache-line-size
= &lt;20&gt;;<br>
                        i-cache-line-size
= &lt;20&gt;;<br>
                        d-cache-size
= &lt;8000&gt;;<br>
                        i-cache-size
= &lt;8000&gt;;<br>
                        timebase-frequency
= &lt;0&gt;;       // from bootloader<br>
                        bus-frequency
=
&lt;0&gt;;            //
from bootloader<br>
                        clock-frequency
= &lt;0&gt;;          // from
bootloader<br>
                        32-bit;<br>
                };<br>
        };<br>
<br>
<br>
        memory {<br>
                device_type
= &quot;memory&quot;;<br>
                reg
= &lt;0x00000000 0x10000000&gt;;  // 256MB at 0<br>
        };<br>
<br>
        bcsr@e2400000 {<br>
                device_type
= &quot;board-control&quot;;<br>
                reg
= &lt;0xe2400000 0x8000&gt;;<br>
        };<br>
        soc8343@e0000000 {<br>
                bus-frequency
= &lt;0x1&gt;;<br>
                reg
= &lt;0xe0000000 0x200&gt;;<br>
                ranges
= &lt;0x0 0xe0000000 0x100000&gt;;<br>
                device_type
= &quot;soc&quot;;<br>
                #interrupt-cells
= &lt;0x2&gt;;<br>
                #size-cells
= &lt;0x1&gt;;<br>
                #address-cells
= &lt;0x1&gt;;<br>
<br>
                wdt@200
{<br>
                        device_type
= &quot;watchdog&quot;;<br>
                        compatible
= &quot;mpc83xx_wdt&quot;;<br>
                        reg
= &lt;0x200 0x100&gt;;<br>
                };<br>
<br>
i2c@3000 {<br>
                        #address-cells
= &lt;1&gt;;<br>
                        #size-cells
= &lt;0&gt;;<br>
                        cell-index
= &lt;0&gt;;<br>
                        compatible
= &quot;fsl-i2c&quot;;<br>
                        reg
= &lt;0x3000 0x100&gt;;<br>
                        interrupts
= &lt;14 0x8&gt;;<br>
                        interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                        dfsrr;<br>
<br>
                        rtc@68
{<br>
                                compatible
= &quot;dallas,ds1374&quot;;<br>
                                reg
= &lt;0x68&gt;;<br>
                        };<br>
                };<br>
<br>
                i2c@3100
{<br>
                        #address-cells
= &lt;1&gt;;<br>
                        #size-cells
= &lt;0&gt;;<br>
                        cell-index
= &lt;1&gt;;<br>
                        compatible
= &quot;fsl-i2c&quot;;<br>
                        reg
= &lt;0x3100 0x100&gt;;<br>
                        interrupts
= &lt;15 0x8&gt;;<br>
                        interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                        dfsrr;<br>
                };<br>
<br>
                spi@7000
{<br>
                        cell-index
= &lt;0&gt;;<br>
                        compatible
= &quot;fsl,spi&quot;;<br>
                        reg
= &lt;0x7000 0x1000&gt;;<br>
                        interrupts
= &lt;16 0x8&gt;;<br>
                        interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                        mode
= &quot;cpu&quot;;<br>
                };<br>
<br>
dma@82a8 {<br>
                        #address-cells
= &lt;1&gt;;<br>
                        #size-cells
= &lt;1&gt;;<br>
                        compatible
= &quot;fsl,mpc8349-dma&quot;, &quot;fsl,elo-dma&quot;;<br>
                        reg
= &lt;0x82a8 4&gt;;<br>
                        ranges
= &lt;0 0x8100 0x1a8&gt;;<br>
                        interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                        interrupts
= &lt;71 8&gt;;<br>
                        cell-index
= &lt;0&gt;;<br>
                        dma-channel@0
{<br>
                                compatible
= &quot;fsl,mpc8349-dma-channel&quot;, &quot;fsl,elo-dma-channel&quot;;<br>
                                reg
= &lt;0 0x80&gt;;<br>
                                interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                                interrupts
= &lt;71 8&gt;;<br>
                        };<br>
                        dma-channel@80
{<br>
                                compatible
= &quot;fsl,mpc8349-dma-channel&quot;, &quot;fsl,elo-dma-channel&quot;;<br>
                                reg
= &lt;0x80 0x80&gt;;<br>
                                interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                                interrupts
= &lt;71 8&gt;;<br>
                        };<br>
                        dma-channel@100
{<br>
                                compatible
= &quot;fsl,mpc8349-dma-channel&quot;, &quot;fsl,elo-dma-channel&quot;;<br>
                                reg
= &lt;0x100 0x80&gt;;<br>
                                interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                                interrupts
= &lt;71 8&gt;;<br>
                        };<br>
                        dma-channel@180
{<br>
                                compatible
= &quot;fsl,mpc8349-dma-channel&quot;, &quot;fsl,elo-dma-channel&quot;;<br>
                                reg
= &lt;0x180 0x28&gt;;<br>
                                interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                                interrupts
= &lt;71 8&gt;;<br>
                        };<br>
                };<br>
/* phy type (ULPI or SERIAL) are only types supported for MPH */<br>
                /*
port = 0 or 1 */<br>
                usb@22000
{<br>
                        compatible
= &quot;fsl-usb2-mph&quot;;<br>
                        reg
= &lt;0x22000 0x1000&gt;;<br>
                        #address-cells
= &lt;1&gt;;<br>
                        #size-cells
= &lt;0&gt;;<br>
                        interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                        interrupts
= &lt;39 0x8&gt;;<br>
                        phy_type
= &quot;ulpi&quot;;<br>
                        port1;<br>
                };<br>
                /*
phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */<br>
                usb@23000
{<br>
                        compatible
= &quot;fsl-usb2-dr&quot;;<br>
                        reg
= &lt;0x23000 0x1000&gt;;<br>
                        #address-cells
= &lt;1&gt;;<br>
                        #size-cells
= &lt;0&gt;;<br>
                        interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                        interrupts
= &lt;38 0x8&gt;;<br>
                        dr_mode
= &quot;otg&quot;;<br>
                        phy_type
= &quot;ulpi&quot;;<br>
                };<br>
<br>
                mdio@24520
{<br>
                        #address-cells
= &lt;1&gt;;<br>
                        #size-cells
= &lt;0&gt;;<br>
                        compatible
= &quot;fsl,gianfar-mdio&quot;;<br>
                        reg
= &lt;0x24520 0x20&gt;;<br>
<br>
                        phy0:
ethernet-phy@0 {<br>
                                interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                                interrupts
= &lt;17 0x8&gt;;<br>
                                reg
= &lt;0x0&gt;;<br>
                                device_type
= &quot;ethernet-phy&quot;;<br>
                        };<br>
                        phy1:
ethernet-phy@1 {<br>
                                interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                                interrupts
= &lt;18 0x8&gt;;<br>
                                reg
= &lt;0x1&gt;;<br>
                                device_type
= &quot;ethernet-phy&quot;;<br>
                        };<br>
enet0: ethernet@24000 {<br>
                        cell-index
= &lt;0&gt;;<br>
                        device_type
= &quot;network&quot;;<br>
                        model
= &quot;TSEC&quot;;<br>
                        compatible
= &quot;gianfar&quot;;<br>
                        reg
= &lt;0x24000 0x1000&gt;;<br>
                        local-mac-address
= [ 00 00 00 00 00 00 ];<br>
                        interrupts
= &lt;32 0x8 33 0x8 34 0x8&gt;;<br>
                        interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                        phy-handle
= &lt;&amp;phy0&gt;;<br>
                        linux,network-index
= &lt;0&gt;;<br>
                };<br>
<br>
                enet1:
ethernet@25000 {<br>
                        cell-index
= &lt;1&gt;;<br>
                        device_type
= &quot;network&quot;;<br>
                        model
= &quot;TSEC&quot;;<br>
                        compatible
= &quot;gianfar&quot;;<br>
                        reg
= &lt;0x25000 0x1000&gt;;<br>
                        local-mac-address
= [ 00 00 00 00 00 00 ];<br>
                        interrupts
= &lt;35 0x8 36 0x8 37 0x8&gt;;<br>
                        interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                        phy-handle
= &lt;&amp;phy1&gt;;<br>
                        linux,network-index
= &lt;1&gt;;<br>
                };<br>
<br>
serial0: serial@4500 {<br>
                        cell-index
= &lt;0&gt;;<br>
                        device_type
= &quot;serial&quot;;<br>
                        compatible
= &quot;ns16550&quot;;<br>
                        reg
= &lt;0x4500 0x100&gt;;<br>
                        clock-frequency
= &lt;0&gt;;<br>
                        interrupts
= &lt;9 0x8&gt;;<br>
                        interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                };<br>
<br>
                serial1:
serial@4600 {<br>
                        cell-index
= &lt;1&gt;;<br>
                        device_type
= &quot;serial&quot;;<br>
                        compatible
= &quot;ns16550&quot;;<br>
                        reg
= &lt;0x4600 0x100&gt;;<br>
                        clock-frequency
= &lt;0&gt;;<br>
                        interrupts
= &lt;10 0x8&gt;;<br>
                        interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                };<br>
<br>
                crypto@30000
{<br>
                        compatible
= &quot;fsl,sec2.0&quot;;<br>
                        reg
= &lt;0x30000 0x10000&gt;;<br>
                        interrupts
= &lt;11 0x8&gt;;<br>
                        interrupt-parent
= &lt;&amp;ipic&gt;;<br>
                        fsl,num-channels
= &lt;4&gt;;<br>
                        fsl,channel-fifo-len
= &lt;24&gt;;<br>
                        fsl,exec-units-mask
= &lt;0x7e&gt;;<br>
                        fsl,descriptor-types-mask
= &lt;0x01010ebf&gt;;<br>
                };<br>
<br>
Thanks,<br>
agnel<br>
<br>
_______________________________________________<br>
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