<p>Can you access fpga memory from u-boot?</p>
<p>Could very well be an fpga problem. Same thing can happen on xilinx parts when accessing an undefined register address via pci bridge --> plb bus --> ipif register block --> bad address. The pci core goes into some kind of retry loop with the plb bus (I'm wasn't the one to look at the pci analyzer, so I don't know the details), and it completely locks up.</p>
<p>g.</p>
<p><blockquote type="cite">On Sep 16, 2009 11:02 PM, "Felix Radensky" <<a href="mailto:felix@embedded-sol.com">felix@embedded-sol.com</a>> wrote:<br><br>Hi,<br>
<br>
On my custom MPC8536 based board running 2.6.31 kernel<br>
FPGA is connected via x2 PCI-E lane. FPGA is identified<br>
during PCI scan and is visible via lspci.<br>
<br>
0000:01:00.0 Class ff00: Altera Corporation Unknown device 0004 (rev 01)<br>
Subsystem: Altera Corporation Unknown device 0004<br>
Flags: fast devsel, IRQ 16<br>
Memory at 98000000 (32-bit, non-prefetchable) [disabled] [size=1M]<br>
Capabilities: [50] Message Signalled Interrupts: Mask+ 64bit+ Queue=0/5 Enable-<br>
Capabilities: [78] Power Management version 3<br>
Capabilities: [80] Express Endpoint IRQ 0<br>
Capabilities: [100] Virtual Channel<br>
<br>
<br>
However when I attempt to access FPGA memory my mmapping it in userspace the read hangs. The same happens in kernel space. Does it happen because FPGA memory is marked as disabled, or because FPGA code is doing something wrong ?<br>
<br>
Another question is what can cause PCI device memory be marked as<br>
disabled.<br>
<br>
Thanks a lot.<br>
<br>
Felix.<br>
<br>
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