<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 3.2//EN">
<HTML>
<HEAD>
<META HTTP-EQUIV="Content-Type" CONTENT="text/html; charset=iso-8859-1">
<META NAME="Generator" CONTENT="MS Exchange Server version 6.5.7654.12">
<TITLE>RE: [PATCH 1/5] powerpc/qe: Make qe_reset() code path safe for repeated invocation</TITLE>
</HEAD>
<BODY>
<!-- Converted from text/plain format -->
<P><FONT SIZE=2>Is the need to reinitialize the QE after resume something that is unique to the 8569, or would it apply to the 8360 and 8323 also?<BR>
<BR>
<BR>
-----Original Message-----<BR>
From: Anton Vorontsov [<A HREF="mailto:avorontsov@ru.mvista.com">mailto:avorontsov@ru.mvista.com</A>]<BR>
Sent: Sun 8/30/2009 2:37 PM<BR>
To: Kumar Gala<BR>
Cc: Tabi Timur-B04825; Wood Scott-B07421; linuxppc-dev@ozlabs.org<BR>
Subject: [PATCH 1/5] powerpc/qe: Make qe_reset() code path safe for repeated invocation<BR>
<BR>
For MPC8569 CPUs we'll need to reset QE after each suspend, so make<BR>
qe_reset() code path suitable for repeated invocation, that is:<BR>
<BR>
- Don't initialize rheap structures if already initialized;<BR>
- Don't allocate muram for SDMA if already allocated, just reinitialize<BR>
registers with previously allocated muram offset;<BR>
- Remove __init attributes from qe_reset() and cpm_muram_init();<BR>
<BR>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com><BR>
---<BR>
arch/powerpc/include/asm/qe.h | 2 +-<BR>
arch/powerpc/sysdev/cpm_common.c | 5 ++++-<BR>
arch/powerpc/sysdev/qe_lib/qe.c | 12 +++++++-----<BR>
3 files changed, 12 insertions(+), 7 deletions(-)<BR>
<BR>
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h<BR>
index e8232bb..2f44754 100644<BR>
--- a/arch/powerpc/include/asm/qe.h<BR>
+++ b/arch/powerpc/include/asm/qe.h<BR>
@@ -87,7 +87,7 @@ extern spinlock_t cmxgcr_lock;<BR>
<BR>
/* Export QE common operations */<BR>
#ifdef CONFIG_QUICC_ENGINE<BR>
-extern void __init qe_reset(void);<BR>
+extern void qe_reset(void);<BR>
#else<BR>
static inline void qe_reset(void) {}<BR>
#endif<BR>
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c<BR>
index e4b6d66..9de72c9 100644<BR>
--- a/arch/powerpc/sysdev/cpm_common.c<BR>
+++ b/arch/powerpc/sysdev/cpm_common.c<BR>
@@ -72,7 +72,7 @@ static phys_addr_t muram_pbase;<BR>
/* Max address size we deal with */<BR>
#define OF_MAX_ADDR_CELLS 4<BR>
<BR>
-int __init cpm_muram_init(void)<BR>
+int cpm_muram_init(void)<BR>
{<BR>
struct device_node *np;<BR>
struct resource r;<BR>
@@ -81,6 +81,9 @@ int __init cpm_muram_init(void)<BR>
int i = 0;<BR>
int ret = 0;<BR>
<BR>
+ if (muram_pbase)<BR>
+ return 0;<BR>
+<BR>
spin_lock_init(&cpm_muram_lock);<BR>
/* initialize the info header */<BR>
rh_init(&cpm_muram_info, 1,<BR>
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c<BR>
index b06564f..4eaf2a9 100644<BR>
--- a/arch/powerpc/sysdev/qe_lib/qe.c<BR>
+++ b/arch/powerpc/sysdev/qe_lib/qe.c<BR>
@@ -91,7 +91,7 @@ phys_addr_t get_qe_base(void)<BR>
<BR>
EXPORT_SYMBOL(get_qe_base);<BR>
<BR>
-void __init qe_reset(void)<BR>
+void qe_reset(void)<BR>
{<BR>
if (qe_immr == NULL)<BR>
qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE);<BR>
@@ -317,16 +317,18 @@ EXPORT_SYMBOL(qe_put_snum);<BR>
static int qe_sdma_init(void)<BR>
{<BR>
struct sdma __iomem *sdma = &qe_immr->sdma;<BR>
- unsigned long sdma_buf_offset;<BR>
+ static unsigned long sdma_buf_offset = (unsigned long)-ENOMEM;<BR>
<BR>
if (!sdma)<BR>
return -ENODEV;<BR>
<BR>
/* allocate 2 internal temporary buffers (512 bytes size each) for<BR>
* the SDMA */<BR>
- sdma_buf_offset = qe_muram_alloc(512 * 2, 4096);<BR>
- if (IS_ERR_VALUE(sdma_buf_offset))<BR>
- return -ENOMEM;<BR>
+ if (IS_ERR_VALUE(sdma_buf_offset)) {<BR>
+ sdma_buf_offset = qe_muram_alloc(512 * 2, 4096);<BR>
+ if (IS_ERR_VALUE(sdma_buf_offset))<BR>
+ return -ENOMEM;<BR>
+ }<BR>
<BR>
out_be32(&sdma->sdebcr, (u32) sdma_buf_offset & QE_SDEBCR_BA_MASK);<BR>
out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK |<BR>
--<BR>
1.6.3.3<BR>
<BR>
<BR>
<BR>
</FONT>
</P>
</BODY>
</HTML>