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Hum... It is a proprietary bridge... I don't know how works the marvel,
but it is not like tundra (TSI108)... But it seems that this bridge
works like X86 bridges. I 'm goigng to read documentations about
Marvel bridges! <br>
<br>
Nicolas Lavocat <br>
<br>
Liu Dave-R63238 a écrit :
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<div dir="ltr" align="left"><span class="549463208-22042009"><font
color="#0000ff" face="Arial" size="2">So the host bridge is important,
what is the bridge?</font></span></div>
<div dir="ltr" align="left"><span class="549463208-22042009"><font
color="#0000ff" face="Arial" size="2">Marvell or Tundra chipset?</font></span></div>
<div dir="ltr" align="left"><span class="549463208-22042009"></span> </div>
<br>
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<hr tabindex="-1"> <font face="Tahoma" size="2"><b>From:</b>
Nicolas Lavocat [<a class="moz-txt-link-freetext" href="mailto:nicolas.lavocat@fr.thalesgroup.com">mailto:nicolas.lavocat@fr.thalesgroup.com</a>] <br>
<b>Sent:</b> Wednesday, April 22, 2009 4:32 PM<br>
<b>To:</b> Liu Dave-R63238<br>
<b>Cc:</b> linuxppc-dev<br>
<b>Subject:</b> Re: freeze when reading a PCI bridge register<br>
</font><br>
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a 7448<br>
<br>
Liu Dave-R63238 a écrit :
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cite="midD7CCA83BB0796C49BC0BB53B6AB1208928C4DB@zch01exm21.fsl.freescale.net"
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<pre wrap="">I' am trying to configure a PCI bridge on a private board, with a
powerpc . In a first time, I tried to get informations about PCI
devices, in order to be sure that my read and write methods work (
using 2 configuration registers, like on an x86 architecture.) . 2
configuration registers are used, for example we write an encoded
address (it is a request to a PCI device) in the first and
the answer of
the PCI device can be read in the second register (it is a
configuration
cycle)
Firstly, I did it by JTAG: it works. Then, under uboot, it is ok.
For example, the code used under u-boot:
volatile u32* addr;
u32 vendor_device_ID;
puts("PCI1 reading PCI VENDOR and DEVICE ID\n");
addr=CFG_ADDR_PCI1;
*addr=0x80007800;
addr= CFG_DATA_PCI1;
vendor_device_ID= *addr;
printf("PCI1: PCI1_VENDOR_DEVICE_ID= %08x \n" ,vendor_device_ID);
Therefore, when I do the same thing under Linux, the system
crash when I
try to read the second register...
Linux is frozen, and there is no error message.
Under Linux, I made an ioremap before use the registers and access to
these registers thanks to functions "in_be32" and "out_be32".
I tried with different endianness to avoid an error of this type.
If I understand, the main difference between u-boot and Linux (about
registers access) is the activation of the MMU.
So I thought that problem could come from it.
I think the problem could came from the configuration of DBAT
and IBATS
registers of the MMU, but I didn't found any information
about the MMU
configuration under Linux.
So after this novel, I have some questions:
-Is the MMU configuration generic under Linux?
-Does somebody think that the problem doesn't come from MMU?
-How does work ioremap? Is it a fully software function, or does it
speaks to MMU to get the effective address from physical address?
-Does somebody have an idea, or a documentation about MMU
configuration
under linux?
-Do you think that my MMU is under the control of an evil spirit? ^^
</pre>
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<pre wrap=""><!---->What is the PowerPC you are using?
</pre>
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