<HTML dir=ltr><HEAD><TITLE>RE: /dev/random on PPC40EXr</TITLE>
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<DIV id=idOWAReplyText9283 dir=ltr>
<DIV dir=ltr><FONT face=Arial color=#000000 size=2>Here I am copy pasting the files and also attaching.</FONT></DIV>
<DIV dir=ltr><FONT face=Arial size=2>--------------trng4xx.c-------------</FONT></DIV>
<DIV dir=ltr><FONT size=2>
<P>/*******************************************************************************</P>
<P>*</P>
<P>* Copyright (c) 2008 Loc Ho <lho@amcc.com></P>
<P>*</P>
<P>* This program is free software; you can redistribute it and/or modify</P>
<P>* it under the terms of the GNU General Public License as published by</P>
<P>* the Free Software Foundation; either version 2 of the License, or</P>
<P>* (at your option) any later version.</P>
<P>*</P>
<P>* This program is distributed in the hope that it will be useful,</P>
<P>* but WITHOUT ANY WARRANTY; without even the implied warranty of</P>
<P>* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</P>
<P>* GNU General Public License for more details.</P>
<P>*</P>
<P>*</P>
<P>* Detail Description:</P>
<P>* This file defines ioctl structures for the Linux CryptoAPI interface. It</P>
<P>* provides user space applications accesss into the Linux CryptoAPI</P>
<P>* functionalities.</P>
<P>*</P>
<P>* @file trng4xx.c</P>
<P>*</P>
<P>* This file provides access to the AMCC PPC4XX TRNG for Linux.</P>
<P>*</P>
<P>*******************************************************************************</P>
<P>*/</P>
<P>#include <linux/version.h></P>
<P>#include <linux/module.h></P>
<P>#include <linux/kernel.h></P>
<P>#include <linux/platform_device.h></P>
<P>#include <linux/hw_random.h></P>
<P>#include <linux/interrupt.h></P>
<P>#include <asm/of_platform.h></P>
<P>#include <asm/io.h></P>
<P>#include "trng4xx.h"</P>
<P>#define TRNG4XX_VER_STR "0.1"</P>
<P>#define PFX KBUILD_MODNAME ": "</P>
<P>struct trng4xx_dev {</P>
<P>struct resource res;</P>
<P>u32 irq;</P>
<P>volatile char __iomem *csr;</P>
<P>struct semaphore access_prot;</P>
<P>u32 datum;</P>
<P>};</P>
<P>struct hal_config {</P>
<P>struct of_device *ofdev;</P>
<P>};</P>
<P>static struct trng4xx_dev trng4xx_dev;</P>
<P>static int trng4xx_irq_handler(int irq, void * id);</P>
<P>static void trng4xx_chk_overflow(void);</P>
<P>int trng4xx_config_set(struct hal_config *cfg)</P>
<P>{</P>
<P>struct device_node *rng_np = cfg->ofdev->node;</P>
<P>int rc = 0;</P>
<P>rc = of_address_to_resource(rng_np, 0, &trng4xx_dev.res);</P>
<P>if (rc)</P>
<P>return -ENODEV;</P>
<P>trng4xx_dev.csr = ioremap(trng4xx_dev.res.start,</P>
<P>trng4xx_dev.res.end - trng4xx_dev.res.start + 1);</P>
<P>if (trng4xx_dev.csr == NULL) {</P>
<P>printk(KERN_ERR PFX "unable to ioremap 0x%02X_%08X size %d\n",</P>
<P>(u32) (trng4xx_dev.res.start >> 32),</P>
<P>(u32) trng4xx_dev.res.start,</P>
<P>(u32) (trng4xx_dev.res.end - trng4xx_dev.res.start + 1));</P>
<P>return -ENOMEM;</P>
<P>}</P>
<P>#if 0</P>
<P>printk("TRNG1 0x%02X_%08X size %d\n",</P>
<P>(u32) (trng4xx_dev.res.start >> 32),</P>
<P>(u32) trng4xx_dev.res.start,</P>
<P>(u32) (trng4xx_dev.res.end - trng4xx_dev.res.start + 1));</P>
<P>#endif</P>
<P>trng4xx_dev.irq = of_irq_to_resource(rng_np, 0, NULL); </P>
<P>printk ("TRNG IRQ = %d\n",trng4xx_dev.irq); </P>
<P>if (trng4xx_dev.irq == NO_IRQ) {</P>
<P>/* Un-map CSR */</P>
<P>iounmap(trng4xx_dev.csr);</P>
<P>trng4xx_dev.csr = NULL;</P>
<P>return -EINVAL;</P>
<P>}</P>
<P>return 0;</P>
<P>}</P>
<P>int trng4xx_pka_config_clear(void)</P>
<P>{</P>
<P>iounmap(trng4xx_dev.csr);</P>
<P>return 0;</P>
<P>}</P>
<P>inline int trng4xx_hw_read32(u32 reg_addr, u32 *data_val)</P>
<P>{</P>
<P>*data_val = in_be32((volatile unsigned __iomem *)</P>
<P>(trng4xx_dev.csr + reg_addr));</P>
<P>return 0;</P>
<P>}</P>
<P>inline int trng4xx_hw_write32(u32 reg_addr, u32 data_val)</P>
<P>{</P>
<P>out_be32((volatile unsigned __iomem *) (trng4xx_dev.csr + reg_addr),</P>
<P>data_val);</P>
<P>return 0;</P>
<P>}</P>
<P>int trng4xx_hw_init(void)</P>
<P>{</P>
<P>int rc;</P>
<P>rc = request_irq(trng4xx_dev.irq, trng4xx_irq_handler,</P>
<P>0, "TRNG", NULL);</P>
<P>if (rc != 0) {</P>
<P>printk(KERN_ERR PFX "failed to register interrupt IRQ %d\n",</P>
<P>trng4xx_dev.irq);</P>
<P>return rc;</P>
<P>}</P>
<P>return 0;</P>
<P>}</P>
<P>int trng4xx_hw_deinit(void)</P>
<P>{</P>
<P>free_irq(trng4xx_dev.irq, NULL);</P>
<P>return 0;</P>
<P>}</P>
<P>static int trng4xx_irq_handler(int irq, void * id)</P>
<P>{</P>
<P>/* TRNG Alarm Counter overflow */</P>
<P>trng4xx_chk_overflow();</P>
<P>return 0;</P>
<P>}</P>
<P>/*******************************************************************************</P>
<P>* TRNG Functions</P>
<P>*******************************************************************************</P>
<P>*/</P>
<P>static void trng4xx_chk_overflow(void)</P>
<P>{</P>
<P>/* TRNG Alarm Counter overflow */</P>
<P>int rc;</P>
<P>u32 val;</P>
<P>struct trng4xx_cfg {</P>
<P>u32 ring1_delay_sel : 3;</P>
<P>u32 ring2_delay_sel : 3;</P>
<P>u32 reset_cnt : 6;</P>
<P>} __attribute__((packed));</P>
<P> </P>
<P>rc = trng4xx_hw_write32(TRNG4XX_ALARMCNT_ADDR, val);</P>
<P>if (rc != 0)</P>
<P>return;</P>
<P>if (val > 128) {</P>
<P>struct trng4xx_cfg *trng4xx_cfg;</P>
<P>/* Alarm count is half, reset it */</P>
<P>rc = trng4xx_hw_read32(TRNG4XX_CFG_ADDR, &val);</P>
<P>if (rc != 0)</P>
<P>return;</P>
<P>trng4xx_cfg = (struct trng4xx_cfg *) &val;</P>
<P>++trng4xx_cfg->ring1_delay_sel;</P>
<P>trng4xx_cfg->ring2_delay_sel = (~trng4xx_cfg->ring1_delay_sel) & 0x07;</P>
<P>rc = trng4xx_hw_write32(TRNG4XX_CFG_ADDR, val);</P>
<P>if (rc != 0)</P>
<P>return;</P>
<P>trng4xx_hw_write32(TRNG4XX_ALARMCNT_ADDR, 0x00000000);</P>
<P>if (rc != 0)</P>
<P>return;</P>
<P>}</P>
<P>}</P>
<P>int trng4xx_random(u32 *rand_val)</P>
<P>{</P>
<P>u32 val = 0;</P>
<P>int rc;</P>
<P>#define MAX_TRY 3</P>
<P>u16 try_cnt = 0;</P>
<P>down(&trng4xx_dev.access_prot);</P>
<P>do {</P>
<P>rc = trng4xx_hw_read32(TRNG4XX_STATUS_ADDR, &val);</P>
<P>if (rc != 0)</P>
<P>goto err;</P>
<P>} while((val & TRNG4XX_STATUS_BUSY) && ++try_cnt <= MAX_TRY);</P>
<P>if (val & TRNG4XX_STATUS_BUSY) {</P>
<P>rc = -EINPROGRESS;</P>
<P>goto err;</P>
<P>}</P>
<P></P>
<P>rc = trng4xx_hw_read32(TRNG4XX_OUTPUT_ADDR, rand_val);</P>
<P> </P>
<P>err:</P>
<P>//printk("status busy\n");</P>
<P>up(&trng4xx_dev.access_prot);</P>
<P>return rc;</P>
<P>}</P>
<P>EXPORT_SYMBOL_GPL(trng4xx_random);</P>
<P>#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)</P>
<P>static int trng4xx_data_present(struct hwrng *rng)</P>
<P>#else</P>
<P>static int trng4xx_data_present(struct hwrng *rng, int wait)</P>
<P>#endif</P>
<P>{</P>
<P>struct trng4xx_dev *dev = (struct trng4xx_dev *) rng->priv;</P>
<P>int i;</P>
<P>u32 val;</P>
<P>printk("inside %s:\n", __FUNCTION__);</P>
<P>down(&trng4xx_dev.access_prot);</P>
<P>/* We should not take more than 200??? us */</P>
<P>for (i = 0; i < 20; i++) {</P>
<P>trng4xx_hw_read32(TRNG4XX_STATUS_ADDR, &val);</P>
<P>if (!(val & TRNG4XX_STATUS_BUSY)) {</P>
<P>trng4xx_hw_read32(TRNG4XX_OUTPUT_ADDR, &dev->datum);</P>
<P>break;</P>
<P>}</P>
<P>#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)</P>
<P>break;</P>
<P>#else</P>
<P>if (!wait)</P>
<P>break;</P>
<P>udelay(10);</P>
<P>#endif</P>
<P>}</P>
<P>up(&trng4xx_dev.access_prot);</P>
<P>return (val & TRNG4XX_STATUS_BUSY) ? 0 : 1;</P>
<P>}</P>
<P>static int trng4xx_data_read(struct hwrng *rng, u32 *data)</P>
<P>{</P>
<P>struct trng4xx_dev *dev = (struct trng4xx_dev *) rng->priv;</P>
<P>*data = dev->datum;</P>
<P>printk("data read = %u\n", *data); </P>
<P>return 0;</P>
<P>}</P>
<P>static int trng4xx_init(struct hwrng *rng)</P>
<P>{</P>
<P>return trng4xx_hw_init();</P>
<P>}</P>
<P>static void trng4xx_cleanup(struct hwrng *rng)</P>
<P>{</P>
<P></P>
<P>trng4xx_hw_deinit();</P>
<P>}</P>
<P>static struct hwrng trng4xx_func = {</P>
<P>.name = "ppc4xx-trng",</P>
<P>.init = trng4xx_init,</P>
<P>.cleanup = trng4xx_cleanup,</P>
<P>.data_present = trng4xx_data_present,</P>
<P>.data_read = trng4xx_data_read,</P>
<P>.priv = (unsigned long) &trng4xx_dev,</P>
<P>};</P>
<P>/*******************************************************************************</P>
<P>*</P>
<P>* Setup Driver with platform registration</P>
<P>*</P>
<P>*******************************************************************************</P>
<P>*/</P>
<P>static int __devinit trng4xx_probe(struct of_device *ofdev,</P>
<P>const struct of_device_id *match)</P>
<P>{</P>
<P>struct hal_config hw_cfg;</P>
<P>int rc;</P>
<P>u32 value, value2;</P>
<P>u32 ctrl_val, control_value;</P>
<P>hw_cfg.ofdev = ofdev;</P>
<P>rc = trng4xx_config_set(&hw_cfg);</P>
<P>if (rc != 0)</P>
<P>return rc;</P>
<P>#if 1</P>
<P>printk( "AMCC 4xx TRNG v%s @0x%02X_%08X size %d IRQ %d\n",</P>
<P>TRNG4XX_VER_STR,</P>
<P>(u32) (trng4xx_dev.res.start >> 32),</P>
<P>(u32) trng4xx_dev.res.start,</P>
<P>(u32) (trng4xx_dev.res.end - trng4xx_dev.res.start + 1),</P>
<P>trng4xx_dev.irq);</P>
<P>#endif</P>
<P>init_MUTEX(&trng4xx_dev.access_prot);</P>
<P>rc = hwrng_register(&trng4xx_func);</P>
<P>if (rc) {</P>
<P>printk(KERN_ERR PFX</P>
<P>"AMCC 4xx TRNG registering failed error %d\n", rc);</P>
<P>goto err;</P>
<P>}</P>
<P></P>
<P>trng4xx_hw_read32(TRNG4XX_CNTL_ADDR, &ctrl_val);</P>
<P>//printk ("cntl value = 0x%x\n", ctrl_val);</P>
<P>value = ctrl_val | TRNG4XX_CNTL_TST_ALARM;</P>
<P>//printk ("value to write = 0x%x\n", value);</P>
<P>/*rc = trng4xx_hw_write32(TRNG4XX_CNTL_ADDR, value);</P>
<P>if (rc != 0)</P>
<P>printk ("ERROR: writing\n");</P>
<P> </P>
<P>trng4xx_hw_read32(TRNG4XX_CNTL_ADDR, &control_value);</P>
<P>printk ("control value = 0x%x\n", control_value);*/</P>
<P></P>
<P>/*value = 0;</P>
<P>printk ("checking random value register\n");</P>
<P>rc = trng4xx_random (&value);</P>
<P></P>
<P></P>
<P>printk ("checking random value register\n");</P>
<P>rc = trng4xx_random (&value2);*/</P>
<P>return rc;</P>
<P>err:</P>
<P>trng4xx_pka_config_clear();</P>
<P>return rc;</P>
<P>}</P>
<P>static int __devexit trng4xx_remove(struct of_device *dev)</P>
<P>{</P>
<P>hwrng_unregister(&trng4xx_func);</P>
<P>trng4xx_pka_config_clear();</P>
<P>return 0;</P>
<P>}</P>
<P>static struct of_device_id trng4xx_match[] = {</P>
<P>{ .compatible = "ppc4xx-trng", },</P>
<P>{ .compatible = "amcc,ppc4xx-trng", },</P>
<P>{ },</P>
<P>};</P>
<P>static struct of_platform_driver trng4xx_driver = {</P>
<P>.name = "ppc4xx-trng",</P>
<P>.match_table = trng4xx_match,</P>
<P>.probe = trng4xx_probe,</P>
<P>.remove = trng4xx_remove,</P>
<P>};</P>
<P>static int __init mod_init(void)</P>
<P>{</P>
<P>printk("entered mod_init\n"); </P>
<P>return of_register_platform_driver(&trng4xx_driver);</P>
<P>}</P>
<P>static void __exit mod_exit(void)</P>
<P>{</P>
<P>of_unregister_platform_driver(&trng4xx_driver);</P>
<P>}</P>
<P>module_init(mod_init);</P>
<P>module_exit(mod_exit);</P>
<P>MODULE_DESCRIPTION("AMCC 4xx True Random Number Generator");</P>
<P>MODULE_LICENSE("GPL");</P></FONT></DIV></DIV>
<DIV dir=ltr> </DIV>
<DIV dir=ltr>------------trng4xx.h ------------------- </DIV>
<DIV dir=ltr> </DIV><FONT size=2>
<P dir=ltr>/*******************************************************************************</P>
<P dir=ltr>*</P>
<P dir=ltr>* Copyright (c) 2008 Loc Ho <lho@amcc.com></P>
<P dir=ltr>*</P>
<P dir=ltr>* This program is free software; you can redistribute it and/or modify</P>
<P dir=ltr>* it under the terms of the GNU General Public License as published by</P>
<P dir=ltr>* the Free Software Foundation; either version 2 of the License, or</P>
<P dir=ltr>* (at your option) any later version.</P>
<P dir=ltr>*</P>
<P dir=ltr>* This program is distributed in the hope that it will be useful,</P>
<P dir=ltr>* but WITHOUT ANY WARRANTY; without even the implied warranty of</P>
<P dir=ltr>* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</P>
<P dir=ltr>* GNU General Public License for more details.</P>
<P dir=ltr>*</P>
<P dir=ltr>*</P>
<P dir=ltr>* Detail Description:</P>
<P dir=ltr>* This file defines ioctl structures for the Linux CryptoAPI interface. It</P>
<P dir=ltr>* provides user space applications accesss into the Linux CryptoAPI</P>
<P dir=ltr>* functionalities.</P>
<P dir=ltr>*</P>
<P dir=ltr>* @file trng4xx.h</P>
<P dir=ltr>*</P>
<P dir=ltr>* This file provides access to the AMCC SoC TRNG.</P>
<P dir=ltr>*</P>
<P dir=ltr>*******************************************************************************</P>
<P dir=ltr>*/</P>
<P dir=ltr>#ifndef __TRNG4XX_H__</P>
<P dir=ltr>#define __TRNG4XX_H__</P>
<P dir=ltr>/*******************************************************************************</P>
<P dir=ltr>* TRNG Register and bit Definitions</P>
<P dir=ltr>*******************************************************************************</P>
<P dir=ltr>*/</P>
<P dir=ltr>/* Register TRNG4XX_STATUS bit definition */</P>
<P dir=ltr>#define TRNG4XX_STATUS_BUSY 0x00000001</P>
<P dir=ltr>/* Register TRNG4XX_CNTL bit definition */</P>
<P dir=ltr>#define TRNG4XX_CNTL_TST_RING_OUT 0x00000001</P>
<P dir=ltr>#define TRNG4XX_CNTL_TST_MODE 0x00000002</P>
<P dir=ltr>#define TRNG4XX_CNTL_TST_RUN 0x00000004</P>
<P dir=ltr>#define TRNG4XX_CNTL_TST_EN1 0x00000008</P>
<P dir=ltr>#define TRNG4XX_CNTL_TST_EN2 0x00000010</P>
<P dir=ltr>#define TRNG4XX_CNTL_DISABLE_ALARM 0x00000020</P>
<P dir=ltr>#define TRNG4XX_CNTL_CLOCK_ON 0x00000040</P>
<P dir=ltr>#define TRNG4XX_CNTL_SHORT_CYCLE 0x00000080</P>
<P dir=ltr>#define TRNG4XX_CNTL_TST_ALARM 0x00000100</P>
<P dir=ltr>#define TRNG4XX_CNTL_TST_LFSR 0x00000200</P>
<P dir=ltr>#define TRNG4XX_CNTL_RESET_LFSR 0x00000400</P>
<P dir=ltr>#define TRNG4XX_CNTL_BYPASS_TRNG 0x00000800</P>
<P dir=ltr>#define TRNG4XX_CNTL_POST_PROC_EN 0x00001000</P>
<P dir=ltr>/* Register TRNG4XX_CFG bit definition */</P>
<P dir=ltr>#define TRNG4XX_CFG_RING1_DELAY_SEL_SHIFT 0</P>
<P dir=ltr>#define TRNG4XX_CFG_RING1_DELAY_SEL_MASK (7)</P>
<P dir=ltr>#define TRNG4XX_CFG_RING2_DELAY_SEL_SHIFT 3</P>
<P dir=ltr>#define TRNG4XX_CFG_RING2_DELAY_SEL_MASK (7 << TRNG4XX_CFG_RING2_DELAY_SEL_SHIFT)</P>
<P dir=ltr>#define TRNG4XX_CFG_RESET_CNT_SHIFT 6</P>
<P dir=ltr>#define TRNG4XX_CFG_RESET_CNT_SHIFT_MASK (0x3F << TRNG4XX_CFG_RING2_DELAY_SEL_SHIFT)</P>
<P dir=ltr>/* TRNG Register definition */</P>
<P dir=ltr>#define TRNG4XX_OUTPUT_ADDR 0x0000</P>
<P dir=ltr>#define TRNG4XX_STATUS_ADDR 0x0004</P>
<P dir=ltr>#define TRNG4XX_CNTL_ADDR 0x0008</P>
<P dir=ltr>#define TRNG4XX_CFG_ADDR 0x000C</P>
<P dir=ltr>#define TRNG4XX_ALARMCNT_ADDR 0x0010</P>
<P dir=ltr>#define TRNG4XX_AREG_ADDR 0x0014</P>
<P dir=ltr>#define TRNG4XX_BREG_ADDR 0x0018</P>
<P dir=ltr>#define TRNG4XX_XREG_0_ADDR 0x001C</P>
<P dir=ltr>#define TRNG4XX_XREG_1_ADDR 0x0020</P>
<P dir=ltr>#define TRNG4XX_XREG_2_ADDR 0x0024</P>
<P dir=ltr>#define TRNG4XX_LFSR1_L_ADDR 0x0028</P>
<P dir=ltr>#define TRNG4XX_LFSR1_H_ADDR 0x002C</P>
<P dir=ltr>#define TRNG4XX_LFSR2_L_ADDR 0x0030</P>
<P dir=ltr>#define TRNG4XX_LFSR2_H_ADDR 0x0034</P>
<P dir=ltr>#define TRNG4XX_KEY0_L_ADDR 0x0038</P>
<P dir=ltr>#define TRNG4XX_KEY0_H_ADDR 0x003C</P>
<P dir=ltr>#define TRNG4XX_KEY1_L_ADDR 0x0040</P>
<P dir=ltr>#define TRNG4XX_KEY1_H_ADDR 0x0044</P>
<P dir=ltr>#define TRNG4XX_IV_L_ADDR 0x0048</P>
<P dir=ltr>#define TRNG4XX_IV_H_ADDR 0x004C</P>
<P dir=ltr>struct hal_config;</P>
<P dir=ltr>/**</P>
<P dir=ltr>* @brief This function MUSTs be called to initialize the HW</P>
<P dir=ltr>* access function.</P>
<P dir=ltr>* @param amcc_hal_cfg HW access configuration. If NULL,</P>
<P dir=ltr>* default will be used.</P>
<P dir=ltr>* @return PPRO_RC_OK or PPRO_RC_FATAL</P>
<P dir=ltr>* @note To load all access functions from HAL with default initial</P>
<P dir=ltr>* map address, pass a NULL as its parameter.</P>
<P dir=ltr>* @n To load all access functions from HAL with default runtime</P>
<P dir=ltr>* map address, initialize an amcc_hal_config_t struct</P>
<P dir=ltr>* with valid HAL signature and set</P>
<P dir=ltr>* amcc_hal_config->flags |= PPRO_HAL_FLAG_LOADINIT;</P>
<P dir=ltr>*</P>
<P dir=ltr>*******************************************************************************</P>
<P dir=ltr>*/</P>
<P dir=ltr>int trng4xx_config_set(struct hal_config *cfg);</P>
<P dir=ltr>/**</P>
<P dir=ltr>* @brief This function MUSTs be called to de-initialize the HW</P>
<P dir=ltr>* access function.</P>
<P dir=ltr>* @return PPRO_RC_OK or PPRO_RC_FATAL</P>
<P dir=ltr>*</P>
<P dir=ltr>*******************************************************************************</P>
<P dir=ltr>*/</P>
<P dir=ltr>int trng4xx_config_clear(void);</P>
<P dir=ltr>/**</P>
<P dir=ltr>* @brief This functions reads from the TRNG registers.</P>
<P dir=ltr>* @param reg_addr Device register offset</P>
<P dir=ltr>* @param data_val An DWORD pointer to store the returned value</P>
<P dir=ltr>* @return PPRO_RC_OK or PPRO_RC_FATAL</P>
<P dir=ltr>*</P>
<P dir=ltr>*******************************************************************************</P>
<P dir=ltr>*/</P>
<P dir=ltr>inline int trng4xx_hw_read32(u32 reg_addr, u32 *data_val);</P>
<P dir=ltr>/**</P>
<P dir=ltr>* @brief This functions writes to the TRNG registers.</P>
<P dir=ltr>* @param reg_addr Device register offset</P>
<P dir=ltr>* @param data_val An DWORD value to write</P>
<P dir=ltr>* @return PPRO_RC_OK or PPRO_RC_FATAL</P>
<P dir=ltr>*</P>
<P dir=ltr>*******************************************************************************</P>
<P dir=ltr>*/</P>
<P dir=ltr>inline int trng4xx_hw_write32(u32 reg_addr, u32 data_val);</P>
<P dir=ltr>/**</P>
<P dir=ltr>* @brief This functions initializes the TRNG for operation.</P>
<P dir=ltr>* @return PPRO_RC_OK or PPRO_RC_FATAL</P>
<P dir=ltr>*</P>
<P dir=ltr>*******************************************************************************</P>
<P dir=ltr>*/</P>
<P dir=ltr>int trng4xx_hw_init(void);</P>
<P dir=ltr>/**</P>
<P dir=ltr>* @brief This functions de-initializes the TRNG.</P>
<P dir=ltr>* @return PPRO_RC_OK or PPRO_RC_FATAL</P>
<P dir=ltr>*</P>
<P dir=ltr>*******************************************************************************</P>
<P dir=ltr>*/</P>
<P dir=ltr>int trng4xx_hw_deinit(void);</P>
<P dir=ltr>/**</P>
<P dir=ltr>* @brief This functions retrieves an true random number.</P>
<P dir=ltr>* @param rand_val A pointer to a DWORD to store the value</P>
<P dir=ltr>* @return PPRO_RC_OK if successfull. PPRO_RC_EINPROGRESS if failed. This</P>
<P dir=ltr>* should not happen as this means the hardware still busy.</P>
<P dir=ltr>*</P>
<P dir=ltr>*******************************************************************************</P>
<P dir=ltr>*/</P>
<P dir=ltr>int trng4xx_random(u32 *rand_val);</P>
<P dir=ltr>#endif</P>
<P></FONT> </P>
<P>------------------------- DTS file ---------------</P><FONT size=2>
<P>/*</P>
<P>* Device Tree Source for AMCC Canyonlands (460EX)</P>
<P>*</P>
<P>* Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de></P>
<P>*</P>
<P>* This file is licensed under the terms of the GNU General Public</P>
<P>* License version 2. This program is licensed "as is" without</P>
<P>* any warranty of any kind, whether express or implied.</P>
<P>*/</P>
<P>/ {</P>
<P>#address-cells = <2>;</P>
<P>#size-cells = <1>;</P>
<P>model = "amcc,canyonlands";</P>
<P>compatible = "amcc,canyonlands";</P>
<P>dcr-parent = <&/cpus/cpu@0>;</P>
<P>aliases {</P>
<P>ethernet0 = &EMAC0;</P>
<P>ethernet1 = &EMAC1;</P>
<P>serial0 = &UART0;</P>
<P>serial1 = &UART1;</P>
<P>};</P>
<P>cpus {</P>
<P>#address-cells = <1>;</P>
<P>#size-cells = <0>;</P>
<P>cpu@0 {</P>
<P>device_type = "cpu";</P>
<P>model = "PowerPC,460EX";</P>
<P>reg = <0>;</P>
<P>clock-frequency = <0>; /* Filled in by U-Boot */</P>
<P>timebase-frequency = <0>; /* Filled in by U-Boot */</P>
<P>i-cache-line-size = <20>;</P>
<P>d-cache-line-size = <20>;</P>
<P>i-cache-size = <8000>;</P>
<P>d-cache-size = <8000>;</P>
<P>dcr-controller;</P>
<P>dcr-access-method = "native";</P>
<P>};</P>
<P>};</P>
<P>memory {</P>
<P>device_type = "memory";</P>
<P>reg = <0 0 0>; /* Filled in by U-Boot */</P>
<P>};</P>
<P>UIC0: interrupt-controller0 {</P>
<P>compatible = "ibm,uic-460ex","ibm,uic";</P>
<P>interrupt-controller;</P>
<P>cell-index = <0>;</P>
<P>dcr-reg = <0c0 009>;</P>
<P>#address-cells = <0>;</P>
<P>#size-cells = <0>;</P>
<P>#interrupt-cells = <2>;</P>
<P>};</P>
<P>UIC1: interrupt-controller1 {</P>
<P>compatible = "ibm,uic-460ex","ibm,uic";</P>
<P>interrupt-controller;</P>
<P>cell-index = <1>;</P>
<P>dcr-reg = <0d0 009>;</P>
<P>#address-cells = <0>;</P>
<P>#size-cells = <0>;</P>
<P>#interrupt-cells = <2>;</P>
<P>interrupts = <1e 4 1f 4>; /* cascade */</P>
<P>interrupt-parent = <&UIC0>;</P>
<P>};</P>
<P>UIC2: interrupt-controller2 {</P>
<P>compatible = "ibm,uic-460ex","ibm,uic";</P>
<P>interrupt-controller;</P>
<P>cell-index = <2>;</P>
<P>dcr-reg = <0e0 009>;</P>
<P>#address-cells = <0>;</P>
<P>#size-cells = <0>;</P>
<P>#interrupt-cells = <2>;</P>
<P>interrupts = <a 4 b 4>; /* cascade */</P>
<P>interrupt-parent = <&UIC0>;</P>
<P>};</P>
<P>UIC3: interrupt-controller3 {</P>
<P>compatible = "ibm,uic-460ex","ibm,uic";</P>
<P>interrupt-controller;</P>
<P>cell-index = <3>;</P>
<P>dcr-reg = <0f0 009>;</P>
<P>#address-cells = <0>;</P>
<P>#size-cells = <0>;</P>
<P>#interrupt-cells = <2>;</P>
<P>interrupts = <10 4 11 4>; /* cascade */</P>
<P>interrupt-parent = <&UIC0>;</P>
<P>};</P>
<P>SDR0: sdr {</P>
<P>compatible = "ibm,sdr-460ex";</P>
<P>dcr-reg = <00e 002>;</P>
<P>};</P>
<P>CPR0: cpr {</P>
<P>compatible = "ibm,cpr-460ex";</P>
<P>dcr-reg = <00c 002>;</P>
<P>};</P>
<P>L2C0: l2c {</P>
<P>compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";</P>
<P>dcr-reg = <20 8 /* Internal SRAM DCR's */</P>
<P>30 8>; /* L2 cache DCR's */</P>
<P>cache-line-size = <20>; /* 32 bytes */</P>
<P>cache-size = <40000>; /* L2, 256K */</P>
<P>interrupt-parent = <&UIC2>;</P>
<P>interrupts = <17 1>;</P>
<P>};</P>
<P>plb {</P>
<P>compatible = "ibm,plb-460ex", "ibm,plb4";</P>
<P>#address-cells = <2>;</P>
<P>#size-cells = <1>;</P>
<P>ranges;</P>
<P>clock-frequency = <0>; /* Filled in by U-Boot */</P>
<P>SDRAM0: sdram {</P>
<P>compatible = "ibm,sdram-460ex", "ibm,sdram-405gp";</P>
<P>dcr-reg = <010 2>;</P>
<P>};</P>
<P>MAL0: mcmal {</P>
<P>compatible = "ibm,mcmal-460ex", "ibm,mcmal2";</P>
<P>dcr-reg = <180 62>;</P>
<P>num-tx-chans = <2>;</P>
<P>num-rx-chans = <10>;</P>
<P>#address-cells = <0>;</P>
<P>#size-cells = <0>;</P>
<P>interrupt-parent = <&UIC2>;</P>
<P>interrupts = < /*TXEOB*/ 6 4</P>
<P>/*RXEOB*/ 7 4</P>
<P>/*SERR*/ 3 4</P>
<P>/*TXDE*/ 4 4</P>
<P>/*RXDE*/ 5 4>;</P>
<P>};</P>
<P>USB0: ehci@bffd0400 {</P>
<P>compatible = "ibm,usb-ehci-460ex", "usb-ehci";</P>
<P>interrupt-parent = <&UIC2>;</P>
<P>interrupts = <1d 4>;</P>
<P>reg = <4 bffd0400 90 4 bffd0490 70>;</P>
<P>};</P>
<P>USB1: usb@bffd0000 {</P>
<P>compatible = "ohci-le";</P>
<P>reg = <4 bffd0000 60>;</P>
<P>interrupt-parent = <&UIC2>;</P>
<P>interrupts = <1e 4>;</P>
<P>};</P>
<P>USBOTG0: usbotg@bff80000 {</P>
<P>compatible = "amcc,usb-otg-460ex";</P>
<P>reg = <4 bff80000 10000>;</P>
<P>interrupt-parent = <&USBOTG0>;</P>
<P>interrupts = <0 1 2>;</P>
<P>#interrupt-cells = <1>;</P>
<P>#address-cells = <0>;</P>
<P>#size-cells = <0>;</P>
<P>interrupt-map = </* USB-OTG */ 0 &UIC2 1c 4</P>
<P>/* HIGH-POWER */ 1 &UIC1 1a 8</P>
<P>/* DMA */ 2 &UIC0 c 4>;</P>
<P>interrupt-map-mask = <ffffffff>;</P>
<P>};</P>
<P>CRYPTO: crypto@180000 {</P>
<P>compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";</P>
<P>reg = <4 00180000 84000>;</P>
<P>interrupt-parent = <&UIC0>;</P>
<P>interrupts = <1d 4>;</P>
<P>};</P>
<P>TRNG: trng@110000 {</P>
<P>device_type = "trng";</P>
<P>compatible = "ppc4xx-trng", "amcc, ppc4xx-trng";</P>
<P>reg = <4 00110000 100>;</P>
<P>interrupt-parent = <&UIC1>;</P>
<P>interrupts = <3 2>;</P>
<P>};</P>
<P></P>
<P>PKA: pka@114000 {</P>
<P>device_type = "pka";</P>
<P>compatible = "ppc4xx-pka", "amcc, ppc4xx-pka";</P>
<P>reg = <4 00114000 4000>;</P>
<P>interrupt-parent = <&UIC0>;</P>
<P>interrupts = <14 2>;</P>
<P>};</P>
<P>POB0: opb {</P>
<P>compatible = "ibm,opb-460ex", "ibm,opb";</P>
<P>#address-cells = <1>;</P>
<P>#size-cells = <1>;</P>
<P>ranges = <b0000000 4 b0000000 50000000>;</P>
<P>clock-frequency = <0>; /* Filled in by U-Boot */</P>
<P>EBC0: ebc {</P>
<P>compatible = "ibm,ebc-460ex", "ibm,ebc";</P>
<P>dcr-reg = <012 2>;</P>
<P>#address-cells = <2>;</P>
<P>#size-cells = <1>;</P>
<P>clock-frequency = <0>; /* Filled in by U-Boot */</P>
<P>/* ranges property is supplied by U-Boot */</P>
<P>interrupts = <6 4>;</P>
<P>interrupt-parent = <&UIC1>;</P>
<P>nor_flash@0,0 {</P>
<P>compatible = "amd,s29gl512n", "cfi-flash";</P>
<P>bank-width = <2>;</P>
<P>reg = <0 000000 4000000>;</P>
<P>#address-cells = <1>;</P>
<P>#size-cells = <1>;</P>
<P>partition@0 {</P>
<P>label = "kernel";</P>
<P>reg = <0 1e0000>;</P>
<P>};</P>
<P>partition@1e0000 {</P>
<P>label = "dtb";</P>
<P>reg = <1e0000 20000>;</P>
<P>};</P>
<P>partition@200000 {</P>
<P>label = "ramdisk";</P>
<P>reg = <200000 1400000>;</P>
<P>};</P>
<P>partition@1600000 {</P>
<P>label = "jffs2";</P>
<P>reg = <1600000 400000>;</P>
<P>};</P>
<P>partition@1a00000 {</P>
<P>label = "user";</P>
<P>reg = <1a00000 2560000>;</P>
<P>};</P>
<P>partition@3f60000 {</P>
<P>label = "env";</P>
<P>reg = <3f60000 40000>;</P>
<P>};</P>
<P>partition@3fa0000 {</P>
<P>label = "u-boot";</P>
<P>reg = <3fa0000 60000>;</P>
<P>};</P>
<P>};</P>
<P>};</P>
<P>UART0: serial@ef600300 {</P>
<P>device_type = "serial";</P>
<P>compatible = "ns16550";</P>
<P>reg = <ef600300 8>;</P>
<P>virtual-reg = <ef600300>;</P>
<P>clock-frequency = <0>; /* Filled in by U-Boot */</P>
<P>current-speed = <0>; /* Filled in by U-Boot */</P>
<P>interrupt-parent = <&UIC1>;</P>
<P>interrupts = <1 4>;</P>
<P>};</P>
<P>UART1: serial@ef600400 {</P>
<P>device_type = "serial";</P>
<P>compatible = "ns16550";</P>
<P>reg = <ef600400 8>;</P>
<P>virtual-reg = <ef600400>;</P>
<P>clock-frequency = <0>; /* Filled in by U-Boot */</P>
<P>current-speed = <0>; /* Filled in by U-Boot */</P>
<P>interrupt-parent = <&UIC0>;</P>
<P>interrupts = <1 4>;</P>
<P>};</P>
<P>UART2: serial@ef600500 {</P>
<P>device_type = "serial";</P>
<P>compatible = "ns16550";</P>
<P>reg = <ef600500 8>;</P>
<P>virtual-reg = <ef600500>;</P>
<P>clock-frequency = <0>; /* Filled in by U-Boot */</P>
<P>current-speed = <0>; /* Filled in by U-Boot */</P>
<P>interrupt-parent = <&UIC1>;</P>
<P>interrupts = <1d 4>;</P>
<P>};</P>
<P>UART3: serial@ef600600 {</P>
<P>device_type = "serial";</P>
<P>compatible = "ns16550";</P>
<P>reg = <ef600600 8>;</P>
<P>virtual-reg = <ef600600>;</P>
<P>clock-frequency = <0>; /* Filled in by U-Boot */</P>
<P>current-speed = <0>; /* Filled in by U-Boot */</P>
<P>interrupt-parent = <&UIC1>;</P>
<P>interrupts = <1e 4>;</P>
<P>};</P>
<P> </P>
<P>IIC0: i2c@ef600700 {</P>
<P>compatible = "ibm,iic-460ex", "ibm,iic";</P>
<P>reg = <ef600700 14>;</P>
<P>interrupt-parent = <&UIC0>;</P>
<P>interrupts = <2 4>;</P>
<P>#address-cells = <1>;</P>
<P>#size-cells = <0>;</P>
<P>rtc@68 {</P>
<P>compatible = "stm,m41t80";</P>
<P>reg = <68>;</P>
<P>};</P>
<P>};</P>
<P> </P>
<P> </P>
<P>IIC1: i2c@ef600800 {</P>
<P>compatible = "ibm,iic-460ex", "ibm,iic";</P>
<P>reg = <ef600800 14>;</P>
<P>interrupt-parent = <&UIC0>;</P>
<P>interrupts = <3 4>;</P>
<P>};</P>
<P>ZMII0: emac-zmii@ef600d00 {</P>
<P>compatible = "ibm,zmii-460ex", "ibm,zmii";</P>
<P>reg = <ef600d00 c>;</P>
<P>};</P>
<P>RGMII0: emac-rgmii@ef601500 {</P>
<P>compatible = "ibm,rgmii-460ex", "ibm,rgmii";</P>
<P>reg = <ef601500 8>;</P>
<P>has-mdio;</P>
<P>};</P>
<P>TAH0: emac-tah@ef601350 {</P>
<P>compatible = "ibm,tah-460ex", "ibm,tah";</P>
<P>reg = <ef601350 30>;</P>
<P>};</P>
<P>TAH1: emac-tah@ef601450 {</P>
<P>compatible = "ibm,tah-460ex", "ibm,tah";</P>
<P>reg = <ef601450 30>;</P>
<P>};</P>
<P>EMAC0: ethernet@ef600e00 {</P>
<P>device_type = "network";</P>
<P>compatible = "ibm,emac-460ex", "ibm,emac4";</P>
<P>interrupt-parent = <&EMAC0>;</P>
<P>interrupts = <0 1>;</P>
<P>#interrupt-cells = <1>;</P>
<P>#address-cells = <0>;</P>
<P>#size-cells = <0>;</P>
<P>interrupt-map = </*Status*/ 0 &UIC2 10 4</P>
<P>/*Wake*/ 1 &UIC2 14 4>;</P>
<P>reg = <ef600e00 70>;</P>
<P>local-mac-address = [000000000000]; /* Filled in by U-Boot */</P>
<P>mal-device = <&MAL0>;</P>
<P>mal-tx-channel = <0>;</P>
<P>mal-rx-channel = <0>;</P>
<P>cell-index = <0>;</P>
<P>max-frame-size = <2328>;</P>
<P>rx-fifo-size = <1000>;</P>
<P>tx-fifo-size = <800>;</P>
<P>phy-mode = "rgmii";</P>
<P>phy-map = <00000000>;</P>
<P>rgmii-device = <&RGMII0>;</P>
<P>rgmii-channel = <0>;</P>
<P>tah-device = <&TAH0>;</P>
<P>tah-channel = <0>;</P>
<P>has-inverted-stacr-oc;</P>
<P>has-new-stacr-staopc;</P>
<P>};</P>
<P>EMAC1: ethernet@ef600f00 {</P>
<P>device_type = "network";</P>
<P>compatible = "ibm,emac-460ex", "ibm,emac4";</P>
<P>interrupt-parent = <&EMAC1>;</P>
<P>interrupts = <0 1>;</P>
<P>#interrupt-cells = <1>;</P>
<P>#address-cells = <0>;</P>
<P>#size-cells = <0>;</P>
<P>interrupt-map = </*Status*/ 0 &UIC2 11 4</P>
<P>/*Wake*/ 1 &UIC2 15 4>;</P>
<P>reg = <ef600f00 70>;</P>
<P>local-mac-address = [000000000000]; /* Filled in by U-Boot */</P>
<P>mal-device = <&MAL0>;</P>
<P>mal-tx-channel = <1>;</P>
<P>mal-rx-channel = <8>;</P>
<P>cell-index = <1>;</P>
<P>max-frame-size = <2328>;</P>
<P>rx-fifo-size = <1000>;</P>
<P>tx-fifo-size = <800>;</P>
<P>phy-mode = "rgmii";</P>
<P>phy-map = <00000000>;</P>
<P>rgmii-device = <&RGMII0>;</P>
<P>rgmii-channel = <1>;</P>
<P>tah-device = <&TAH1>;</P>
<P>tah-channel = <1>;</P>
<P>has-inverted-stacr-oc;</P>
<P>has-new-stacr-staopc;</P>
<P>mdio-device = <&EMAC0>;</P>
<P>};</P>
<P>};</P>
<P>PCIX0: pci@c0ec00000 {</P>
<P>device_type = "pci";</P>
<P>#interrupt-cells = <1>;</P>
<P>#size-cells = <2>;</P>
<P>#address-cells = <3>;</P>
<P>compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix";</P>
<P>primary;</P>
<P>large-inbound-windows;</P>
<P>enable-msi-hole;</P>
<P>reg = <c 0ec00000 8 /* Config space access */</P>
<P>0 0 0 /* no IACK cycles */</P>
<P>c 0ed00000 4 /* Special cycles */</P>
<P>c 0ec80000 100 /* Internal registers */</P>
<P>c 0ec80100 fc>; /* Internal messaging registers */</P>
<P>/* Outbound ranges, one memory and one IO,</P>
<P>* later cannot be changed</P>
<P>*/</P>
<P>ranges = <02000000 0 80000000 0000000d 80000000 0 80000000</P>
<P>01000000 0 00000000 0000000c 08000000 0 00010000>;</P>
<P>/* Inbound 2GB range starting at 0 */</P>
<P>dma-ranges = <42000000 0 0 0 0 0 80000000>;</P>
<P>/* This drives busses 0 to 0x3f */</P>
<P>bus-range = <0 3f>;</P>
<P>/* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */</P>
<P>interrupt-map-mask = <0000 0 0 0>;</P>
<P>interrupt-map = < 0000 0 0 0 &UIC1 0 8 >;</P>
<P>};</P>
<P>PCIE0: pciex@d00000000 {</P>
<P>device_type = "pci";</P>
<P>#interrupt-cells = <1>;</P>
<P>#size-cells = <2>;</P>
<P>#address-cells = <3>;</P>
<P>compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";</P>
<P>primary;</P>
<P>port = <0>; /* port number */</P>
<P>reg = <d 00000000 20000000 /* Config space access */</P>
<P>c 08010000 00001000>; /* Registers */</P>
<P>dcr-reg = <100 020>;</P>
<P>sdr-base = <300>;</P>
<P>/* Outbound ranges, one memory and one IO,</P>
<P>* later cannot be changed</P>
<P>*/</P>
<P>ranges = <02000000 0 80000000 0000000e 00000000 0 80000000</P>
<P>01000000 0 00000000 0000000f 80000000 0 00010000>;</P>
<P>/* Inbound 2GB range starting at 0 */</P>
<P>dma-ranges = <42000000 0 0 0 0 0 80000000>;</P>
<P>/* This drives busses 40 to 0x7f */</P>
<P>bus-range = <40 7f>;</P>
<P>/* Legacy interrupts (note the weird polarity, the bridge seems</P>
<P>* to invert PCIe legacy interrupts).</P>
<P>* We are de-swizzling here because the numbers are actually for</P>
<P>* port of the root complex virtual P2P bridge. But I want</P>
<P>* to avoid putting a node for it in the tree, so the numbers</P>
<P>* below are basically de-swizzled numbers.</P>
<P>* The real slot is on idsel 0, so the swizzling is 1:1</P>
<P>*/</P>
<P>interrupt-map-mask = <0000 0 0 7>;</P>
<P>interrupt-map = <</P>
<P>0000 0 0 1 &UIC3 c 4 /* swizzled int A */</P>
<P>0000 0 0 2 &UIC3 d 4 /* swizzled int B */</P>
<P>0000 0 0 3 &UIC3 e 4 /* swizzled int C */</P>
<P>0000 0 0 4 &UIC3 f 4 /* swizzled int D */>;</P>
<P>};</P>
<P>PCIE1: pciex@d20000000 {</P>
<P>device_type = "pci";</P>
<P>#interrupt-cells = <1>;</P>
<P>#size-cells = <2>;</P>
<P>#address-cells = <3>;</P>
<P>compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";</P>
<P>primary;</P>
<P>port = <1>; /* port number */</P>
<P>reg = <d 20000000 20000000 /* Config space access */</P>
<P>c 08011000 00001000>; /* Registers */</P>
<P>dcr-reg = <120 020>;</P>
<P>sdr-base = <340>;</P>
<P>/* Outbound ranges, one memory and one IO,</P>
<P>* later cannot be changed</P>
<P>*/</P>
<P>ranges = <02000000 0 80000000 0000000e 80000000 0 80000000</P>
<P>01000000 0 00000000 0000000f 80010000 0 00010000>;</P>
<P>/* Inbound 2GB range starting at 0 */</P>
<P>dma-ranges = <42000000 0 0 0 0 0 80000000>;</P>
<P>/* This drives busses 80 to 0xbf */</P>
<P>bus-range = <80 bf>;</P>
<P>/* Legacy interrupts (note the weird polarity, the bridge seems</P>
<P>* to invert PCIe legacy interrupts).</P>
<P>* We are de-swizzling here because the numbers are actually for</P>
<P>* port of the root complex virtual P2P bridge. But I want</P>
<P>* to avoid putting a node for it in the tree, so the numbers</P>
<P>* below are basically de-swizzled numbers.</P>
<P>* The real slot is on idsel 0, so the swizzling is 1:1</P>
<P>*/</P>
<P>interrupt-map-mask = <0000 0 0 7>;</P>
<P>interrupt-map = <</P>
<P>0000 0 0 1 &UIC3 10 4 /* swizzled int A */</P>
<P>0000 0 0 2 &UIC3 11 4 /* swizzled int B */</P>
<P>0000 0 0 3 &UIC3 12 4 /* swizzled int C */</P>
<P>0000 0 0 4 &UIC3 13 4 /* swizzled int D */>;</P>
<P>};</P>
<P>};</P>
<P>};</P></FONT>
<DIV dir=ltr> </DIV>
<DIV dir=ltr>-------------------- Kconfig ----------</DIV><FONT size=2>
<P dir=ltr>#</P>
<P dir=ltr># Hardware Random Number Generator (RNG) configuration</P>
<P dir=ltr>#</P>
<P dir=ltr>config HW_RANDOM</P>
<P dir=ltr>tristate "Hardware Random Number Generator Core support"</P>
<P dir=ltr>default m</P>
<P dir=ltr>---help---</P>
<P dir=ltr>Hardware Random Number Generator Core infrastructure.</P>
<P dir=ltr>To compile this driver as a module, choose M here: the</P>
<P dir=ltr>module will be called rng-core. This provides a device</P>
<P dir=ltr>that's usually called /dev/hw_random, and which exposes one</P>
<P dir=ltr>of possibly several hardware random number generators.</P>
<P dir=ltr>These hardware random number generators do not feed directly</P>
<P dir=ltr>into the kernel's random number generator. That is usually</P>
<P dir=ltr>handled by the "rngd" daemon. Documentation/hw_random.txt</P>
<P dir=ltr>has more information.</P>
<P dir=ltr>If unsure, say Y.</P>
<P dir=ltr>config HW_RANDOM_INTEL</P>
<P dir=ltr>tristate "Intel HW Random Number Generator support"</P>
<P dir=ltr>depends on HW_RANDOM && (X86 || IA64) && PCI</P>
<P dir=ltr>default HW_RANDOM</P>
<P dir=ltr>---help---</P>
<P dir=ltr>This driver provides kernel-side support for the Random Number</P>
<P dir=ltr>Generator hardware found on Intel i8xx-based motherboards.</P>
<P dir=ltr>To compile this driver as a module, choose M here: the</P>
<P dir=ltr>module will be called intel-rng.</P>
<P dir=ltr>If unsure, say Y.</P>
<P dir=ltr>config HW_RANDOM_AMD</P>
<P dir=ltr>tristate "AMD HW Random Number Generator support"</P>
<P dir=ltr>depends on HW_RANDOM && X86 && PCI</P>
<P dir=ltr>default HW_RANDOM</P>
<P dir=ltr>---help---</P>
<P dir=ltr>This driver provides kernel-side support for the Random Number</P>
<P dir=ltr>Generator hardware found on AMD 76x-based motherboards.</P>
<P dir=ltr>To compile this driver as a module, choose M here: the</P>
<P dir=ltr>module will be called amd-rng.</P>
<P dir=ltr>If unsure, say Y.</P>
<P dir=ltr>config HW_RANDOM_GEODE</P>
<P dir=ltr>tristate "AMD Geode HW Random Number Generator support"</P>
<P dir=ltr>depends on HW_RANDOM && X86_32 && PCI</P>
<P dir=ltr>default HW_RANDOM</P>
<P dir=ltr>---help---</P>
<P dir=ltr>This driver provides kernel-side support for the Random Number</P>
<P dir=ltr>Generator hardware found on the AMD Geode LX.</P>
<P dir=ltr>To compile this driver as a module, choose M here: the</P>
<P dir=ltr>module will be called geode-rng.</P>
<P dir=ltr>If unsure, say Y.</P>
<P dir=ltr>config HW_RANDOM_VIA</P>
<P dir=ltr>tristate "VIA HW Random Number Generator support"</P>
<P dir=ltr>depends on HW_RANDOM && X86_32</P>
<P dir=ltr>default HW_RANDOM</P>
<P dir=ltr>---help---</P>
<P dir=ltr>This driver provides kernel-side support for the Random Number</P>
<P dir=ltr>Generator hardware found on VIA based motherboards.</P>
<P dir=ltr>To compile this driver as a module, choose M here: the</P>
<P dir=ltr>module will be called via-rng.</P>
<P dir=ltr>If unsure, say Y.</P>
<P dir=ltr>config HW_RANDOM_IXP4XX</P>
<P dir=ltr>tristate "Intel IXP4xx NPU HW Random Number Generator support"</P>
<P dir=ltr>depends on HW_RANDOM && ARCH_IXP4XX</P>
<P dir=ltr>default HW_RANDOM</P>
<P dir=ltr>---help---</P>
<P dir=ltr>This driver provides kernel-side support for the Random</P>
<P dir=ltr>Number Generator hardware found on the Intel IXP4xx NPU.</P>
<P dir=ltr>To compile this driver as a module, choose M here: the</P>
<P dir=ltr>module will be called ixp4xx-rng.</P>
<P dir=ltr>If unsure, say Y.</P>
<P dir=ltr>config HW_RANDOM_OMAP</P>
<P dir=ltr>tristate "OMAP Random Number Generator support"</P>
<P dir=ltr>depends on HW_RANDOM && (ARCH_OMAP16XX || ARCH_OMAP24XX)</P>
<P dir=ltr>default HW_RANDOM</P>
<P dir=ltr>---help---</P>
<P dir=ltr>This driver provides kernel-side support for the Random Number</P>
<P dir=ltr>Generator hardware found on OMAP16xx and OMAP24xx multimedia</P>
<P dir=ltr>processors.</P>
<P dir=ltr>To compile this driver as a module, choose M here: the</P>
<P dir=ltr>module will be called omap-rng.</P>
<P dir=ltr>If unsure, say Y.</P>
<P dir=ltr>config HW_RANDOM_PASEMI</P>
<P dir=ltr>tristate "PA Semi HW Random Number Generator support"</P>
<P dir=ltr>depends on HW_RANDOM && PPC_PASEMI</P>
<P dir=ltr>default HW_RANDOM</P>
<P dir=ltr>---help---</P>
<P dir=ltr>This driver provides kernel-side support for the Random Number</P>
<P dir=ltr>Generator hardware found on PA Semi PWRficient SoCs.</P>
<P dir=ltr>To compile this driver as a module, choose M here: the</P>
<P dir=ltr>module will be called pasemi-rng.</P>
<P dir=ltr>If unsure, say Y.</P>
<P dir=ltr>config HW_RANDOM_TRNG4xx</P>
<P dir=ltr>tristate "AMCC 4xx TRNG True Random Number Generator support"</P>
<P dir=ltr>depends on HW_RANDOM && PPC</P>
<P dir=ltr>default HW_RANDOM</P>
<P dir=ltr>---help---</P>
<P dir=ltr>This driver provides kernel-side support for the Random Number</P>
<P dir=ltr>Generator hardware found on PA Semi PWRficient SoCs.</P>
<P dir=ltr>To compile this driver as a module, choose M here: the</P>
<P dir=ltr>module will be called pasemi-rng.</P>
<P dir=ltr>If unsure, say Y.</P>
<DIV dir=ltr></FONT>----------------------------------------Makefile --------------------</DIV>
<DIV dir=ltr><FONT size=2>
<P>#</P>
<P># Makefile for HW Random Number Generator (RNG) device drivers.</P>
<P>#</P>
<P>obj-$(CONFIG_HW_RANDOM) += rng-core.o</P>
<P>rng-core-y := core.o</P>
<P>obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o</P>
<P>obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o</P>
<P>obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o</P>
<P>obj-$(CONFIG_HW_RANDOM_VIA) += via-rng.o</P>
<P>obj-$(CONFIG_HW_RANDOM_IXP4XX) += ixp4xx-rng.o</P>
<P>obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o</P>
<P>obj-$(CONFIG_HW_RANDOM_PASEMI) += pasemi-rng.o</P>
<P>obj-$(CONFIG_HW_RANDOM_TRNG4xx) += trng4xx.o</P></FONT><BR></DIV>
<DIV dir=ltr>
<HR tabIndex=-1>
</DIV>
<DIV dir=ltr><FONT face=Tahoma size=2><B>From:</B> linuxppc-dev-bounces+tmarri=amcc.com@ozlabs.org on behalf of Tirumala Reddy Marri<BR><B>Sent:</B> Wed 4/1/2009 10:05 AM<BR><B>To:</B> Felix Radensky; linuxppc-dev@ozlabs.org<BR><B>Subject:</B> RE: /dev/random on PPC40EXr<BR></FONT><BR></DIV>
<DIV>
<P><FONT size=2>There is PKA/TRNG driver for sure. Let me check if it was accepted in<BR>opensource yet. Otherwise I will forward you the driver which may not be<BR>there in opensource yet.<BR><BR><BR>-----Original Message-----<BR>From: linuxppc-dev-bounces+tmarri=amcc.com@ozlabs.org<BR>[<A href="mailto:linuxppc-dev-bounces+tmarri=amcc.com@ozlabs.org">mailto:linuxppc-dev-bounces+tmarri=amcc.com@ozlabs.org</A>] On Behalf Of<BR>Felix Radensky<BR>Sent: Wednesday, April 01, 2009 5:00 AM<BR>To: linuxppc-dev@ozlabs.org<BR>Subject: /dev/random on PPC40EXr<BR><BR><BR>Hi,<BR><BR>On my custom board based on 405EXr /dev/random produces no output<BR>at all, and /dev/urandom is not random enough for our purposes. Saving<BR>entropy pool between reboots doesn't help much.<BR><BR>What can be done to increase the entropy of the system ?<BR>I was thinking of adding IRQF_SAMPLE_RANDOM to network driver,<BR>but since not too many drivers implement it, I don't know whether<BR>it's a good idea or not.<BR><BR>Is there any work in progress to develop hw_random driver for 4xx<BR>TRNG ?<BR><BR>Thanks a lot.<BR><BR>Felix.<BR>--<BR>View this message in context:<BR><A href="http://www.nabble.com/-dev-random-on-PPC40EXr-tp22824979p22824979.html">http://www.nabble.com/-dev-random-on-PPC40EXr-tp22824979p22824979.html</A><BR>Sent from the linuxppc-dev mailing list archive at Nabble.com.<BR><BR>_______________________________________________<BR>Linuxppc-dev mailing list<BR>Linuxppc-dev@ozlabs.org<BR><A href="https://ozlabs.org/mailman/listinfo/linuxppc-dev">https://ozlabs.org/mailman/listinfo/linuxppc-dev</A><BR>_______________________________________________<BR>Linuxppc-dev mailing list<BR>Linuxppc-dev@ozlabs.org<BR><A href="https://ozlabs.org/mailman/listinfo/linuxppc-dev">https://ozlabs.org/mailman/listinfo/linuxppc-dev</A><BR></FONT></P></DIV></BODY></HTML>