<style id="sinamailpaperfilter">.sinamailpaper-0{cursor:text;}.sinamailpaper-0 td,.sinamailpaper-0 textarea,.sinamailpaper-0 input,.sinamailpaper-0 br,.sinamailpaper-0 div,.sinamailpaper-0 span{font-size:14px;font-family:"????",Verdana,Arial,Helvetica,sans-serif;line-height:1.5;}.sinamailpaper-0 p{*margin:0.2em auto;}.sinamailpaper-0 img{border:0;}.sinamailpaper-0 pre{white-space:normal;}.sinamailpaper-0 form{margin:0;}</style><P>there is something confused me, which is my kernel code is halt because of something wrong i have no hint about it.</P>
<P>my bootloader is u-boot, version is 1.1.4, kernel version is 2.6.14.1, processor is MPC8247.</P>
<P>u-boot have run on the board already. bootloader booting information as follow:</P>
<P>U-Boot 1.1.4 (Mar 22 2009 - 20:30:57)</P>
<P>MPC8272 Reset Status: External Soft, External Hard</P>
<P>MPC8272 Clock Configuration<BR> - Bus-to-Core Mult 4x, VCO Div 2, 60x Bus Freq 25-75 , Core Freq 100-300<BR> - dfbrg 1, corecnf 0x1a, busdf 3, cpmdf 1, plldf 0, pllmf 3<BR> - vco_out 400000000, scc_clk 100000000, brg_clk 25000000<BR> - cpu_clk 400000000, cpm_clk 200000000, bus_clk 100000000</P>
<P>Board: Motorola MPC8272ADS<BR>DRAM: 32 MB<BR>FLASH: 512 kB<BR>In: serial<BR>Out: serial<BR>Err: serial<BR>Net: FCC1 ETHERNET<BR>Hit any key to stop autoboot: 0 </P>
<P>then i "tftp uImage" and "bootm" with no parameters, i suppose that booting kernel will be normal at beginning even if there is no any parameters. </P>
<P>=> tftp</P>
<P>Using FCC1 ETHERNET device<BR>TFTP from server 192.168.0.99; our IP address is 192.168.0.100<BR>Filename 'uImage'.<BR>Load address: 0x400000<BR>Loading: #################################################################<BR> #################################################################<BR> ########################################################<BR>done<BR>Bytes transferred = 952157 (e875d hex)<BR>=> bootm</P>
<P>## Booting image at 00400000 ...<BR> Image Name: Linux-2.6.14<BR> Image Type: PowerPC Linux Kernel Image (gzip compressed)<BR> Data Size: 952093 Bytes = 929.8 kB<BR> Load Address: 00000000<BR> Entry Point: 00000000<BR> Verifying Checksum ... OK<BR>OK</P>
<P> </P>
<P>by LEDs i am sure that it surely performs in kernel. then by sequence early_init, mmu_off, clear_bats and flush_tlbs.</P>
<P>at call_setup_cpu, the performing is halt, i get "bl call_setup_cpu" will invoke setup_common_caches actually. right here, enable caches for 603e by HID0, get HID0 register and setting DCE and ICE bit put into HID0 register, the performing halt. </P>
<P>_GLOBAL(__setup_cpu_603)<BR> b setup_common_caches</P>
<P>setup_common_caches:<BR> mfspr r11,SPRN_HID0<BR> andi. r0,r11,HID0_DCE<BR> ori r11,r11,HID0_ICE|HID0_DCE<BR> ori r8,r11,HID0_ICFI<BR> bne 1f /* don't invalidate the D-cache */<BR>/* halt here */ <BR> ori r8,r8,HID0_DCI /* unless it wasn't enabled */<BR>1: sync<BR> mtspr SPRN_HID0,r8 /* enable and invalidate caches */<BR> sync<BR> mtspr SPRN_HID0,r11 /* enable caches */<BR> sync<BR> isync<BR> blr</P>
<P>then after i clear HI0_DCI , performing will run till MSR[DR] is set, i clear that bit. will run again. </P>
<P>i have nerver changed the code because i think there is something be independent of my board device. isnt?</P>
<P>why the performing halt there ? or do you think there is something wrong in the front?<BR>Cheers~ <BR>Sauce</P><hr /><br /><a href = 'http://space.sina.com.cn/ '>新浪空间——与朋友开心分享网络新生活！</a>