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Grant Likely schrieb:
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cite="mid:fa686aa40803180731g3892e737h29db0cb917946588@mail.gmail.com"
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<pre wrap="">On Tue, Mar 18, 2008 at 4:34 AM, Andre Schwarz
<a class="moz-txt-link-rfc2396E" href="mailto:andre.schwarz@matrix-vision.de"><andre.schwarz@matrix-vision.de></a> wrote:
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<pre wrap=""> Grant,
sorry for having troubled you. Looks like the build system has been in an
invalid state...
After doing a git-pull and "make distclean" + "make mpc5200_defconfig" the
system is finally up and running.
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<pre wrap=""><!---->
Heh; I hate it when that happens. :-)
Congratulations.
g.
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Grant,<br>
<br>
this leads to the next questions ... :-)<br>
<br>
I've read some discussions about the "interrupt-map" attribute of the
pci node. I tried to follow Ben and David in their explanations -
obviously I didn't really get it.<br>
Looks like there are a lot of people outside who need some
enlightenment ... including me, of course.<br>
<br>
Maybe you can clarify this ?<br>
<br>
Taken from motionpro.dts ...<br>
<br>
interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot<br>
c000 0 0 2 &mpc5200_pic 1 1 3<br>
c000 0 0 3 &mpc5200_pic 1 2 3<br>
c000 0 0 4 &mpc5200_pic 1 3 3<br>
<br>
c800 0 0 1 &mpc5200_pic 1 1 3 //
2nd slot<br>
c800 0 0 2 &mpc5200_pic 1 2 3<br>
c800 0 0 3 &mpc5200_pic 1 3 3<br>
c800 0 0 4 &mpc5200_pic 0 0 3>;<br>
<br>
<br>
First parameter seems to be the slot number, i.e. IDSEL line of the PCI
device. <br>
How is this value coded ? Are these the bits 15..11 of the
configuration address ?<br>
<br>
2nd + 3rd paramter : no clue ! can you explain ?<br>
<br>
4th : seem to be INT_A ... _D of a PCI device. Usually a device uses
only INT_A. Do we need 4 entries in any case ?<br>
<br>
5th : ok - parent pic <br>
<br>
6th ... 8th : IRQ representation of the parent pic, which gives :<br>
<br>
6th : 0=CRIT for irq0 pin, 1=MAIN for irq1..3 pins<br>
7th : irq number. 1 for the irq0 pin inside CRIT level. irq1..3
have number 1..3 inside MAIN level.<br>
8th : should be 3 = "level low" which is default for PCI.<br>
<br>
<br>
<br>
<br>
regards,<br>
Andre<br>
<BR>
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