Use MSR_PMM to disable performance monitor counting while in idle,
instead of using the CTRL register like on the IBM implementation.

This needs further cleanup. It should be possible to switch over the
default behaviour to MSR_PMM on IBM hardware too.

Index: 2.6.21/arch/powerpc/kernel/process.c
===================================================================
--- 2.6.21.orig/arch/powerpc/kernel/process.c
+++ 2.6.21/arch/powerpc/kernel/process.c
@@ -972,13 +972,18 @@ void ppc64_runlatch_on(void)
 {
 	unsigned long ctrl;
 
-	if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) {
+//	if (cpu_has_feature(CPU_FTR_CTRL) && !test_thread_flag(TIF_RUNLATCH)) {
+	if (!test_thread_flag(TIF_RUNLATCH)) {
 		HMT_medium();
 
 		ctrl = mfspr(SPRN_CTRLF);
 		ctrl |= CTRL_RUNLATCH;
 		mtspr(SPRN_CTRLT, ctrl);
 
+		ctrl = mfmsr();
+		ctrl &= ~MSR_PMM;
+		mtmsrd(ctrl);
+
 		set_thread_flag(TIF_RUNLATCH);
 	}
 }
@@ -987,7 +992,8 @@ void ppc64_runlatch_off(void)
 {
 	unsigned long ctrl;
 
-	if (cpu_has_feature(CPU_FTR_CTRL) && test_thread_flag(TIF_RUNLATCH)) {
+//	if (cpu_has_feature(CPU_FTR_CTRL) && test_thread_flag(TIF_RUNLATCH)) {
+	if (test_thread_flag(TIF_RUNLATCH)) {
 		HMT_medium();
 
 		clear_thread_flag(TIF_RUNLATCH);
@@ -995,6 +1001,10 @@ void ppc64_runlatch_off(void)
 		ctrl = mfspr(SPRN_CTRLF);
 		ctrl &= ~CTRL_RUNLATCH;
 		mtspr(SPRN_CTRLT, ctrl);
+
+		ctrl = mfmsr();
+		ctrl |= MSR_PMM;
+		mtmsrd(ctrl);
 	}
 }
 #endif
Index: 2.6.21/arch/powerpc/oprofile/op_model_pa6t.c
===================================================================
--- 2.6.21.orig/arch/powerpc/oprofile/op_model_pa6t.c
+++ 2.6.21/arch/powerpc/oprofile/op_model_pa6t.c
@@ -109,6 +109,8 @@ static void pa6t_reg_setup(struct op_cou
 			pr_debug("turned off counter %u\n", pmc);
 		}
 
+	sys->mmcr0 |= PA6T_MMCR0_FCM1;
+
 	if (sys->enable_kernel)
 		sys->mmcr0 |= PA6T_MMCR0_SUPEN | PA6T_MMCR0_HYPEN;
 	else

--