<div>Dave, watchdog timeout is around one second and no cpu activity for that long is something wrong. Is it ok to disable it to hide the problem lying somewhere else? Do you think it can be because of sync-isync instructions and moving to
2.6 might resolve it?</div>
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<div><span class="gmail_quote">On 9/20/06, <b class="gmail_sendername">Liu Dave-r63238</b> <<a href="mailto:DaveLiu@freescale.com">DaveLiu@freescale.com</a>> wrote:</span>
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<div dir="ltr" align="left"><br>No MSR is 00029030 and user mode bit is not set here.<br><br>I had missed it in the prev mail:<br><br>NIP: C0005DA4 XER: 20000000 LR: C0004FE4 SP: C01F3000 REGS: c01eff30 TRAP: 1020 Not tainted
<br>MSR: 00029030 EE: 1 PR: 0 FP: 0 ME: 1 IR/DR: 11 <br>TASK = c01f1080[0] 'swapper' Last syscall: 120<br>last math 00000000 last altivec 00000000<br>PLB0: bear= 0x08000000 acr= 0xbb000000 besr= 0x00000000<br><span><font face="宋体" color="#0000ff" size="2">
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<div dir="ltr" align="left"><span><font face="宋体" color="#0000ff" size="2">Dave>I notice that MSR and TRAP, MSR is 00029030- the critical interrupt enable.</font></span></div>
<div dir="ltr" align="left"><span><font face="宋体" color="#0000ff" size="2">Dave>TRAP is 1020. --WatchDog timer exception is happening</font></span></div>
<div dir="ltr" align="left"><span><font face="宋体" color="#0000ff" size="2">Dave>You can disable the MSR[CE] bit to no critical exception or disable the WD timer</font></span></div><span class="q">
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<div><span class="gmail_quote">On 9/20/06, <b class="gmail_sendername">Linas Vepstas</b> <<a onclick="return top.js.OpenExtLink(window,event,this)" href="mailto:linas@austin.ibm.com" target="_blank">linas@austin.ibm.com
</a>> wrote:</span>
<blockquote class="gmail_quote" style="PADDING-LEFT: 1ex; MARGIN: 0pt 0pt 0pt 0.8ex; BORDER-LEFT: rgb(204,204,204) 1px solid">On Thu, Sep 21, 2006 at 08:38:13AM +1000, Benjamin Herrenschmidt wrote:<br>> On Wed, 2006-09-20 at 15:31 -0700, Manoj Sharma wrote:
<br>> > This is the stack trace.<br>> ><br>> > Registers:<br>> > GPR00: 00069030 <br><br>This is the MSR and it has the user-mode bit set, which is surely wrong.<br>This is not how one gets to user space.
<br><br>00048000<br><br>The MSR had this or'ed into it, which is setting the user-mode bit.<br>Surely that's wrong. <br><br>--linas<br></blockquote></div><br></blockquote></span></div></blockquote></div><br>