<div>Hello all, </div>
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<div>I am Sewook Wee at Stanford University.</div>
<div>For the research purpose, I am hacking the linux kernel (version 2.4.30) for The PPC405 in Virtex II Pro Xilinx FPGA. </div>
<div>What I want to do is make Data Cache policy to be write-through, not write-back.</div>
<div>I changed the DCWR Value in the arch/ppc/mm/44x_mmu.c, but seems it does not work. </div>
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<div>I hope some of you have decent idea to make it happen.</div>
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<div>Thanks.</div>
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<div>-- <br>Sewook Wee<br> <a href="mailto:weese@stanford.edu">weese@stanford.edu</a><br> Computer System Laboratory <br> Stanford University </div>