===== arch/ppc/boot/common/util.S 1.10 vs edited ===== --- 1.10/arch/ppc/boot/common/util.S Wed Feb 12 13:34:20 2003 +++ edited/arch/ppc/boot/common/util.S Fri Feb 14 10:01:45 2003 @@ -100,7 +100,7 @@ isync mfspr r8,L2CR rlwinm r8,r8,0,1,31 - oris r8,r8,0x0020 + oris r8,r8,L2CR_L2I@h sync isync mtspr L2CR,r8 @@ -108,14 +108,51 @@ isync /* Wait for the invalidation to complete */ -1: mfspr r8,L2CR - rlwinm. r9,r8,0,31,31 + mfspr r8,PVR + srwi r8,r8,16 + cmplwi r8,(PVR_7450 >> 16) + bne 2f + +1: mfspr r8,L2CR /* On 745x, poll L2I bit (bit 10) */ + rlwinm. r9,r8,0,10,10 bne 1b + b 3f + +2: mfspr r8,L2CR /* On 75x & 74x0, poll L2IP bit (bit 31) */ + rlwinm. r9,r8,0,31,31 + bne 2b - rlwinm r8,r8,0,11,9 /* Turn off L2I bit */ +3: rlwinm r8,r8,0,11,9 /* Turn off L2I bit */ sync isync mtspr L2CR,r8 + sync + isync + blr + + .globl _setup_L3CR +_setup_L3CR: + /* Invalidate/disable L3 cache */ + sync + isync + mfspr r8,L3CR + rlwinm r8,r8,0,1,31 + ori r8,r8,L3CR_L3I@l + sync + isync + mtspr L3CR,r8 + sync + isync + + /* Wait for the invalidation to complete */ +1: mfspr r8,L3CR + rlwinm. r9,r8,0,21,21 + bne 1b + + rlwinm r8,r8,0,22,20 /* Turn off L3I bit */ + sync + isync + mtspr L3CR,r8 sync isync blr ===== arch/ppc/boot/simple/head.S 1.7 vs edited ===== --- 1.7/arch/ppc/boot/simple/head.S Tue Jan 14 08:45:33 2003 +++ edited/arch/ppc/boot/simple/head.S Thu Feb 13 17:20:30 2003 @@ -76,6 +76,14 @@ #if defined(CONFIG_FORCE) || defined(CONFIG_K2) \ || defined(CONFIG_EV64260) || defined(CONFIG_PAL4) bl _setup_L2CR + + /* If 745x, turn off L3CR as well */ + mfspr r8,PVR + srwi r8,r8,16 + cmplwi r8,(PVR_7450 >> 16) + bne 1f + bl _setup_L3CR +1: #endif #endif