[PATCH] powerpc/fsl_pci: Fix P2P bridge handling for MPC83xx PCIe controllers

[Kumar Gala]

On Dec 7, 2009, at 4:54 PM, Anton Vorontsov wrote:

> It appears that we wrongly calculate dev_base for type1 config cycles.
> The thing is: we shouldn't subtract hose->first_busno because PCI core
> sets PCI primary, secondary and subordinate bus numbers, and PCIe
> controller actually takes the registers into account. So we should use
> just bus->number.
> 
> Also, according to MPC8315 reference manual, primary bus number should
> always remain 0. We have PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS quirk
> in indirect_pci.c, but since 83xx is somewhat special, it doesn't use
> indirect_pci.c routines, so we have to implement the quirk specifically
> for 83xx PCIe controllers.
> 
> Signed-off-by: Anton Vorontsov <avorontsov at ru.mvista.com>
> ---

applied to next

- k