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<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009>Hi
All,</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009>We are using
PowerPc440 core on our Soc that consists of PCIe core, SAS core and many other
things.</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009>We are writing DTS
for our board to be used during booting, we have gone through various dts files
available inside the Linux Kernel 2.6.31.</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009>Our board is closets
match with Taishan board.</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009>While referring the
Taishan.dts, we are unable to get the information regarding Interrupt-map and
interrupt-map-mask property.</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009>Please refer to the
snippet.......</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009>It would be great if
anybody help me to understand the way they are writing these
properties?</SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009>I also gone through
the DTS document <STRONG>booting-without-of</STRONG> but that does not help us,
so anybody having any documents on <FONT color=#008000><STRONG>How To Write
DTS</STRONG> <FONT color=#000000>can help me
out.</FONT></FONT></SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2><SPAN
class=726193808-23112009></SPAN></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009>PCIX0: <A
href="mailto:pci@20ec00000">pci@20ec00000</A> {<BR> device_type
= "pci";<BR> #interrupt-cells =
<1>;<BR> #size-cells =
<2>;<BR> #address-cells =
<3>;<BR> compatible = "ibm,plb440gp-pcix",
"ibm,plb-pcix";<BR> primary;<BR> large-inbound-windows;<BR> enable-msi-hole;<BR> reg
= <0x00000002 0x0ec00000 0x00000008 /* Config space access
*/<BR> 0x00000000
0x00000000 0x00000000 /* no IACK cycles
*/<BR> 0x00000002
0x0ed00000 0x00000004 /* Special cycles
*/<BR> 0x00000002
0x0ec80000 0x00000100 /* Internal registers
*/<BR> 0x00000002
0x0ec80100 0x000000fc>; /* Internal messaging registers
*/</SPAN></FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009> /*
Outbound ranges, one memory and one IO,<BR> * later cannot be
changed<BR> */<BR> ranges = <0x02000000
0x00000000 0x80000000 0x00000003 0x80000000 0x00000000
0x80000000<BR> 0x01000000 0x00000000 0x00000000
0x00000002 0x08000000 0x00000000 0x00010000>;</SPAN></FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009> /*
Inbound 2GB range starting at 0 */<BR> dma-ranges =
<0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;</SPAN></FONT></DIV>
<DIV> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009> <FONT
color=#ff0000> interrupt-map-mask = <0xf800 0x0 0x0
0x7>;<BR> interrupt-map = <<BR> /*
IDSEL 1 */<BR> 0x800 0x0 0x0 0x1 &UIC0 0x17
0x8<BR> 0x800 0x0 0x0 0x2 &UIC0 0x18
0x8<BR> 0x800 0x0 0x0 0x3 &UIC0 0x19
0x8<BR> 0x800 0x0 0x0 0x4 &UIC0 0x1a
0x8</FONT></SPAN></FONT></DIV>
<DIV><FONT color=#ff0000></FONT> </DIV>
<DIV><FONT face=Arial size=2><SPAN class=726193808-23112009><FONT
color=#ff0000> /* IDSEL 2
*/<BR> 0x1000 0x0 0x0 0x1 &UIC0 0x18
0x8<BR> 0x1000 0x0 0x0 0x2 &UIC0 0x19
0x8<BR> 0x1000 0x0 0x0 0x3 &UIC0 0x1a
0x8<BR> 0x1000 0x0 0x0 0x4 &UIC0 0x17
0x8<BR> >;<BR></FONT> };</SPAN></FONT></DIV>
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