<table cellspacing="0" cellpadding="0" border="0" ><tr><td valign="top" style="font: inherit;"><br><br> <br> I'm attempting to get SPI to work on my embedded design<br> that is based on the mpc8313erbd reference board wiht a<br> 2.6.27 kernel. I cannot open the SPI device. <br> Tracing through the kernel code, it looks like the device is<br> not being found in the DTB file. However there is a<br> SPI node in there already described. Our boards is a<br> SPI master, and the device we will attach is a SPI<br> slave. Could someone elaborate on what is needed in<br> the DTS file to have our SPI driver work and respond to an<br> open() call?<br> <br> I've attached our latest attempt at modifying the DTS<br> file.<br> <br> <br> <br>> /*<br>> * MPC8313E RDB Device Tree Source<br>> *<br>> * Copyright 2005, 2006, 2007 Freescale
Semiconductor Inc.<br>> *<br>> * This program is free software; you can<br>> redistribute it and/or modify it<br>> * under the terms of the GNU General <br>> Public License as published by the<br>> * Free Software Foundation; either version 2 of<br>> the License, or (at your<br>> * option) any later version.<br>> */<br>> /dts-v1/;<br>> / {<br>> model = "MPC8313ERDB";<br>> compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";<br>> #address-cells = <1>;<br>> #size-cells = <1>;<br>> aliases {<br>> ethernet0 = &enet0;<br>> ethernet1 = &enet1;<br>> serial0 = &serial0;<br>> serial1 = &serial1;<br>> pci0 = &pci0;<br>> };<br>> cpus {<br>> #address-cells = <1>;<br>> #size-cells = <0>;<br>> PowerPC,8313@0 {<br>>
device_type = "cpu";<br>> reg = <0x0>;<br>> d-cache-line-size = <32>;<br>> i-cache-line-size = <32>;<br>> d-cache-size = <16384>;<br>> i-cache-size = <16384>;<br>> timebase-frequency = <0>; // from<br>> bootloader<br>> bus-frequency = <0>; // from<br>> bootloader<br>> clock-frequency = <0>; //<br>> from bootloader<br>> };<br>> };<br>> memory {<br>> device_type = "memory";<br>> reg = <0x00000000 0x08000000>; // 128MB at 0<br>> };<br>> localbus@e0005000 {<br>> #address-cells = <2>;<br>> #size-cells = <1>;<br>> compatible = "fsl,mpc8313-elbc", "fsl,elbc",<br>> "simple-bus";<br>> reg = <0xe0005000
0x1000>;<br>> interrupts = <77 0x8>;<br>> interrupt-parent = <&ipic>;<br>> // CS0 and CS1 are swapped when<br>> // booting from nand, but the<br>> // addresses are the same.<br>> ranges = <0x0 0x0 0xfe000000 0x00200000<br>> 0x1 0x0<br>> 0xc0000000 0x02000000<br>> 0x2 0x0<br>> 0xf0000000 0x00020000<br>> 0x3 0x0<br>> 0xfa000000 0x00008000>;<br>> /* remapped for our part */<br>> flash@0,0 {<br>> #address-cells = <1>;<br>> #size-cells = <1>;<br>> compatible = "cfi-flash";<br>> reg = <0x0 0x0 0x200000>;<br>> bank-width = <2>;<br>> device-width = <1>;<br>>
<br>> u-boot@0 {<br>> reg = <0x0 0x40000>;<br>> };<br>> u-boot-env@40000 {<br>> reg = <0x40000 0x10000>;<br>> };<br>> kernel@50000 {<br>> reg = <0x50000 0x1A0000>;<br>> };<br>> dtb@1F0000 {<br>> reg = <0x1f0000 0x10000>;<br>> };<br>> };<br>> /* DCC - remapped for our part */<br>> nand@1,0 {<br>> #address-cells = <1>;<br>> #size-cells = <1>;<br>> compatible = "fsl,mpc8313-fcm-nand",<br>> <br>> "fsl,elbc-fcm-nand";<br>> reg = <0x1 0x0 0x02000000>;<br>> fs1@0 {<br>>
reg = <0x0 0x10000000>;<br>> };<br>> fs2@10000000 {<br>> reg = <0x10000000 0x10000000>;<br>> };<br>> };<br>> };<br>> soc8313@e0000000 {<br>> #address-cells = <1>;<br>> #size-cells = <1>;<br>> device_type = "soc";<br>> compatible = "simple-bus";<br>> ranges = <0x0 0xe0000000 0x00100000>;<br>> reg = <0xe0000000 0x00000200>;<br>> bus-frequency = <0>;<br>> wdt@200 {<br>> device_type = "watchdog";<br>> compatible = "mpc83xx_wdt";<br>> reg = <0x200 0x100>;<br>> };<br>> /*<br>> * FPGA-TNG device<br>> * used 4 external interrupts<br>> * IRQ0 - magnetec stripe image writer/reader<br>> *
IRQ1 - picture image writer<br>> * IRQ2 - RFID reader -<br>> * IRQ3 - MiniPCI?<br>> * IRQ4 - motion devices<br>> */<br>> fpga-tng@f0000000 {<br>> #address-cells = <1>;<br>> #size-cells = <1>;<br>> compatible = "fpga-tng";<br>> ranges;<br>> /* IRQ 0 level */<br>> magstripe@00 {<br>> device_type = "magstripe";<br>> compatible = "ms_tng";<br>> reg = <0x00 0x4>;<br>> interrupts = <48 0x8>;<br>> interrupt-parent = < &ipic >;<br>> };<br>> /* IRQ 1 level */<br>> tph@5e {<br>> device_type = "tph";<br>> compatible = "tph_tng";<br>> reg =
<0x5e 0x4>;<br>> interrupts = <17 0x8>;<br>> interrupt-parent = < &ipic >;<br>> };<br>> motion@8e {<br>> device_type = "motion";<br>> compatible = "motion_tng";<br>> reg = <0x8e 0x4>;<br>> interrupts = <20 0x8>;<br>> interrupt-parent = < &ipic >;<br>> };<br>> };<br>> sleep-nexus {<br>> #address-cells = <1>;<br>> #size-cells = <1>;<br>> compatible = "simple-bus";<br>> sleep = <&pmc 0x03000000>;<br>> ranges;<br>> pit@400 {<br>> device_type = "pit";<br>> compatible = "mpc_pit";<br>> reg = <0x400 0x100>;<br>>
interrupts = <65 0x8>;<br>> interrupt-parent = < &ipic >;<br>> clock-frequency = <133333330>;<br>> };<br>> i2c@3000 {<br>> #address-cells = <1>;<br>> #size-cells = <0>;<br>> cell-index = <0>;<br>> compatible = "fsl-i2c";<br>> reg = <0x3000 0x100>;<br>> interrupts = <14 0x8>;<br>> interrupt-parent = <&ipic>;<br>> dfsrr;<br>> sensor@48 {<br>> compatible = "national,lm75";<br>> reg = <0x48>;<br>> };<br>> rtc@68 {<br>> compatible = "dallas,ds1339";<br>> reg = <0x68>;<br>> };<br>>
<br>> };<br>> spi@7000 {<br>> device_type = "spi";<br>> cell-index = <0>;<br>> compatible =<br>> "fsl,spi","fsl,mpc83xx-spi","fsl,mpc83xx_spi";<br>> reg = <0x7000 0x1000>;<br>> interrupts = <21 0x8>;<br>> interrupt-parent = <&ipic>;<br>> mode = "cpu";<br>> <br>> fsl_m25p80@0 {<br>> compatible = "fsl,spi";<br>> reg = <0>;<br>> voltage-ranges = <3300<br>> 3300>;<br>> spi-max-frequency =<br>> <6000000>;<br>> }; <br>> }; <br>> crypto@30000 {<br>> compatible = "fsl,sec2.2",
"fsl,sec2.1",<br>> <br>> "fsl,sec2.0";<br>> reg = <0x30000 0x10000>;<br>> interrupts = <11 0x8>;<br>> interrupt-parent = <&ipic>;<br>> fsl,num-channels = <1>;<br>> fsl,channel-fifo-len = <24>;<br>> fsl,exec-units-mask = <0x4c>;<br>> fsl,descriptor-types-mask =<br>> <0x0122003f>;<br>> };<br>> };<br>> i2c@3100 {<br>> #address-cells = <1>;<br>> #size-cells = <0>;<br>> cell-index = <1>;<br>> compatible = "fsl-i2c";<br>> reg = <0x3100 0x100>;<br>> interrupts = <15 0x8>;<br>> interrupt-parent =
<&ipic>;<br>> dfsrr;<br>> };<br>> spi@7000 {<br>> device_type = "spi";<br>> cell-index = <0>;<br>> compatible =<br>> "fsl,spi","fsl,mpc83xx_spi";<br>> reg = <0x7000 0x1000>;<br>> interrupts = <16 0x8>;<br>> interrupt-parent = <&ipic>;<br>> mode = "cpu";<br>> <br>> mp85p20@0 {<br>> compatible = "fsl,spi";<br>> reg = <0>;<br>> voltage-ranges = <3300<br>> 3300>;<br>> spi-max-frequency =<br>> <6000000>;<br>> }; <br>> };<br>> dma@82a8 {<br>> #address-cells = <1>;<br>>
#size-cells = <1>;<br>> compatible = "fsl,mpc8313-dma",<br>> "fsl,elo-dma";<br>> reg = <0x82a8 4>;<br>> ranges = <0 0x8100 0x1a8>;<br>> interrupt-parent = <&ipic>;<br>> interrupts = <71 8>;<br>> cell-index = <0>;<br>> dma-channel@0 {<br>> compatible = "fsl,mpc8313-dma-channel",<br>> "fsl,elo-dma-channel";<br>> reg = <0 0x80>;<br>> interrupt-parent = <&ipic>;<br>> interrupts = <71 8>;<br>> };<br>> dma-channel@80 {<br>> compatible = "fsl,mpc8313-dma-channel",<br>> "fsl,elo-dma-channel";<br>> reg = <0x80 0x80>;<br>> interrupt-parent = <&ipic>;<br>>
interrupts = <71 8>;<br>> };<br>> dma-channel@100 {<br>> compatible = "fsl,mpc8313-dma-channel",<br>> "fsl,elo-dma-channel";<br>> reg = <0x100 0x80>;<br>> interrupt-parent = <&ipic>;<br>> interrupts = <71 8>;<br>> };<br>> dma-channel@180 {<br>> compatible = "fsl,mpc8313-dma-channel",<br>> "fsl,elo-dma-channel";<br>> reg = <0x180 0x28>;<br>> interrupt-parent = <&ipic>;<br>> interrupts = <71 8>;<br>> };<br>> };<br>> /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */<br>> usb@23000 {<br>> compatible = "fsl-usb2-dr";<br>> reg = <0x23000 0x1000>;<br>>
#address-cells = <1>;<br>> #size-cells = <0>;<br>> interrupt-parent = <&ipic>;<br>> interrupts = <38 0x8>;<br>> phy_type = "utmi_wide";<br>> dr_mode = "peripheral";<br>> sleep = <&pmc 0x00300000>;<br>> };<br>> enet0: ethernet@24000 {<br>> #address-cells = <1>;<br>> #size-cells = <1>;<br>> sleep = <&pmc 0x20000000>;<br>> ranges;<br>> cell-index = <0>;<br>> device_type = "network";<br>> model = "eTSEC";<br>> compatible = "gianfar", "simple-bus";<br>> reg = <0x24000 0x1000>;<br>> local-mac-address = [ 00 00 00 00 00
00<br>> ];<br>> interrupts = <32 0x8 33 0x8 34<br>> 0x8>;<br>> interrupt-parent = <&ipic>;<br>> phy-handle = < &phy3 >;<br>> fsl,magic-packet;<br>> mdio@24520 {<br>> #address-cells = <1>;<br>> #size-cells = <0>;<br>> compatible = "fsl,gianfar-mdio";<br>> reg = <0x24520 0x20>;<br>> phy3: ethernet-phy@3 {<br>> interrupt-parent =<br>> <&ipic>;<br>> reg = <0x3>;<br>> device_type = "ethernet-phy";<br>> };<br>> phy1: ethernet-phy@1 {<br>> interrupt-parent =<br>> <&ipic>;<br>> reg = <0x1>;<br>>
device_type = "ethernet-phy";<br>> };<br>> };<br>> };<br>> enet1: ethernet@25000 {<br>> cell-index = <1>;<br>> device_type = "network";<br>> model = "eTSEC";<br>> compatible = "gianfar";<br>> reg = <0x25000 0x1000>;<br>> local-mac-address = [ 00 00 00 00 00 00<br>> ];<br>> interrupts = <35 0x8 36 0x8 37<br>> 0x8>;<br>> interrupt-parent = <&ipic>;<br>> phy-handle = < &phy1 >;<br>> sleep = <&pmc 0x10000000>;<br>> fsl,magic-packet;<br>> };<br>> serial0: serial@4500 {<br>> cell-index = <0>;<br>> device_type = "serial";<br>>
compatible = "ns16550";<br>> reg = <0x4500 0x100>;<br>> clock-frequency = <0>;<br>> interrupts = <9 0x8>;<br>> interrupt-parent = <&ipic>;<br>> };<br>> serial1: serial@4600 {<br>> cell-index = <1>;<br>> device_type = "serial";<br>> compatible = "ns16550";<br>> reg = <0x4600 0x100>;<br>> clock-frequency = <0>;<br>> interrupts = <10 0x8>;<br>> interrupt-parent = <&ipic>;<br>> };<br>> /* IPIC<br>> * interrupts cell = <intr #,<br>> sense><br>> * sense values match linux<br>> IORESOURCE_IRQ_* defines:<br>> * sense == 8: Level, low
assertion<br>> * sense == 2: Edge, high-to-low change<br>> */<br>> ipic: pic@700 {<br>> interrupt-controller;<br>> #address-cells = <0>;<br>> #interrupt-cells = <2>;<br>> reg = <0x700 0x100>;<br>> device_type = "ipic";<br>> };<br>> pmc: power@b00 {<br>> compatible = "fsl,mpc8313-pmc",<br>> "fsl,mpc8349-pmc";<br>> reg = <0xb00 0x100 0xa00 0x100>;<br>> interrupts = <80 8>;<br>> interrupt-parent = <&ipic>;<br>> fsl,mpc8313-wakeup-timer =<br>> <&gtm1>;<br>> /* Remove this (or change to "okay") if<br>> you have<br>> * a REVA3 or later board, if you apply one of<br>> the<br>>
* workarounds listed in section 8.5 of the<br>> board<br>> * manual, or if you are adapting this device<br>> tree<br>> * to a different board.<br>> */<br>> status = "fail";<br>> };<br>> gtm1: timer@500 {<br>> compatible = "fsl,mpc8313-gtm",<br>> "fsl,gtm";<br>> reg = <0x500 0x100>;<br>> interrupts = <90 8 78 8 84 8 72<br>> 8>;<br>> interrupt-parent = <&ipic>;<br>> };<br>> timer@600 {<br>> compatible = "fsl,mpc8313-gtm",<br>> "fsl,gtm";<br>> reg = <0x600 0x100>;<br>> interrupts = <91 8 79 8 85 8 73<br>> 8>;<br>> interrupt-parent = <&ipic>;<br>> };<br>> };<br>> sleep-nexus {<br>>
#address-cells = <1>;<br>> #size-cells = <1>;<br>> compatible = "simple-bus";<br>> sleep = <&pmc 0x00010000>;<br>> ranges;<br>> pci0: pci@e0008500 {<br>> cell-index = <1>;<br>> interrupt-map-mask = <0xf800 0x0 0x0<br>> 0x7>;<br>> interrupt-map = <<br>> /* IDSEL 0x0E -mini PCI */<br>> 0x7000 0x0 0x0 0x1 &ipic 18 0x8<br>> 0x7000 0x0 0x0 0x2 &ipic 18 0x8<br>> 0x7000 0x0 0x0 0x3 &ipic 18 0x8<br>> 0x7000 0x0 0x0 0x4 &ipic 18 0x8<br>> /* IDSEL 0x0F - PCI slot */<br>> 0x7800 0x0 0x0 0x1 &ipic 17 0x8<br>> 0x7800 0x0 0x0 0x2 &ipic 18 0x8<br>> 0x7800 0x0 0x0 0x3
&ipic 17 0x8<br>> 0x7800 0x0 0x0 0x4 &ipic 18<br>> 0x8>;<br>> interrupt-parent = <&ipic>;<br>> interrupts = <66 0x8>;<br>> bus-range = <0x0 0x0>;<br>> ranges = <0x02000000 0x0 0x90000000<br>> 0x90000000 0x0 0x10000000<br>> 0x42000000 0x0 0x80000000 0x80000000<br>> 0x0 0x10000000<br>> 0x01000000 0x0 0x00000000 0xe2000000<br>> 0x0 0x00100000>;<br>> clock-frequency = <66666666>;<br>> #interrupt-cells = <1>;<br>> #size-cells = <2>;<br>> #address-cells = <3>;<br>> reg = <0xe0008500 0x100>;<br>> compatible = "fsl,mpc8349-pci";<br>> device_type = "pci";<br>> };<br>>
};<br>> };<br>> <br>> <br>> <br>> <br>> </td></tr></table><br>