<table cellspacing="0" cellpadding="0" border="0" ><tr><td valign="top" style="font: inherit;">Ok.<br><br>Tha main problem is that if I cross-compile kernel for ARCH=ppc everythings work fine. <br><br>>"Configuring the Ethernet pins for USB IO is just a pin routing board setup task."<br><br>What should I do for this?!?!?<br><br>* I've configured the port_config in <span style="font-style: italic;">lite5200_setup_cpu(void)</span> function [arch/powerpc/platforms/52xx/lite5200.c]. I put in port_config the same value that I put with ARCH=ppc!<br><br>However I'm sure that my u-boot sets-up the port_config register because <span style="font-weight: bold;">fatls usb 0:1 /</span> show me the content of usb-storage.<br><br>Thanks,<br>@ngel<br>--- <b>Ven 5/12/08, Grant Likely <i><grant.likely@secretlab.ca></i></b> ha scritto:<br><blockquote style="border-left: 2px solid rgb(16, 16, 255); margin-left: 5px; padding-left: 5px;">Da: Grant Likely
<grant.likely@secretlab.ca><br>Oggetto: Re: usb/eth DTS nodes for custom board based on mpc5200<br>A: s104259@yahoo.it<br>Cc: devicetree-discuss@ozlabs.org, "linuxppc-dev" <linuxppc-dev@ozlabs.org><br>Data: Venerdì 5 dicembre 2008, 15:40<br><br><pre>On Fri, Dec 5, 2008 at 4:22 AM, Angelo <s104259@yahoo.it> wrote:<br>> Hi all.<br>><br>> I'd like to know if it's necessary to modify my DTS.<br>><br>> On my board I have:<br>> * u-boot 1.2.0<br>> * kernel 2.6.21<br>> * arch=powerpc<br>> * dts based on lite5200b.dts<br>> * USB port (USB2) configured on the Ethernet port<br>><br>> Is it necessary to combine Ethernet and usb nodes into the device tree<br>> source?<br><br>No. Configuring the Ethernet pins for USB IO is just a pin routing<br>board setup task. You do need to make sure U-Boot sets up the<br>port_config register correctly, but it doesn't impact the device tree.<br> You don't need to change
any of the values in the USB node.<br><br>However, if the Ethernet device is unused then you should remove the<br>Ethernet node from your device tree.<br><br>g.<br><br>-- <br>Grant Likely, B.Sc., P.Eng.<br>Secret Lab Technologies Ltd.<br></pre></blockquote></td></tr></table><br>