Index: linux-2.6.22/arch/powerpc/platforms/cell/spufs/backing_ops.c
===================================================================
--- linux-2.6.22.orig/arch/powerpc/platforms/cell/spufs/backing_ops.c
+++ linux-2.6.22/arch/powerpc/platforms/cell/spufs/backing_ops.c
@@ -55,9 +55,10 @@ static void gen_spu_event(struct spu_con
 	ch0_data = ctx->csa.spu_chnldata_RW[0];
 	ch1_data = ctx->csa.spu_chnldata_RW[1];
 	ctx->csa.spu_chnldata_RW[0] |= event;
-	if ((ch0_cnt == 0) && !(ch0_data & event) && (ch1_data & event)) {
+	/* ch1_data is always 0 here */
+	/*if ((ch0_cnt == 0) && !(ch0_data & event) && (ch1_data & event)) {*/
 		ctx->csa.spu_chnlcnt_RW[0] = 1;
-	}
+	/*}*/
 }
 
 static int spu_backing_mbox_read(struct spu_context *ctx, u32 * data)
Index: linux-2.6.22/arch/powerpc/platforms/cell/spufs/switch.c
===================================================================
--- linux-2.6.22.orig/arch/powerpc/platforms/cell/spufs/switch.c
+++ linux-2.6.22/arch/powerpc/platforms/cell/spufs/switch.c
@@ -626,6 +626,11 @@ static inline void save_ch_part1(struct 
 	out_be64(&priv2->spu_chnlcntptr_RW, 1);
 	csa->spu_chnldata_RW[1] = in_be64(&priv2->spu_chnldata_RW);
 
+	/* Save CH 2, without channel count */
+	out_be64(&priv2->spu_chnlcntptr_RW, 2);
+	csa->spu_chnldata_RW[2] = in_be64(&priv2->spu_chnldata_RW);
+	printk("Saving Channel 2 0x%X (spu=%d)\n", csa->spu_chnldata_RW[2], spu->number);
+	
 	/* Save the following CH: [0,3,4,24,25,27] */
 	for (i = 0; i < 7; i++) {
 		idx = ch_indices[i];
@@ -1102,6 +1107,10 @@ static inline void reset_ch_part1(struct
 	out_be64(&priv2->spu_chnlcntptr_RW, 1);
 	out_be64(&priv2->spu_chnldata_RW, 0UL);
 
+	/* Reset CH 2 */
+	out_be64(&priv2->spu_chnlcntptr_RW, 2);
+	out_be64(&priv2->spu_chnldata_RW, 0UL);
+	
 	/* Reset the following CH: [0,3,4,24,25,27] */
 	for (i = 0; i < 7; i++) {
 		idx = ch_indices[i];
@@ -1573,6 +1582,11 @@ static inline void restore_ch_part1(stru
 	out_be64(&priv2->spu_chnlcntptr_RW, 1);
 	out_be64(&priv2->spu_chnldata_RW, csa->spu_chnldata_RW[1]);
 
+	/* Restore CH 2 without count */
+	out_be64(&priv2->spu_chnlcntptr_RW, 2);
+	out_be64(&priv2->spu_chnldata_RW, csa->spu_chnldata_RW[2]);
+	printk("Setting Channel 2 to 0x%X (spu=%d)\n", csa->spu_chnldata_RW[2], spu->number);
+
 	/* Restore the following CH: [0,3,4,24,25,27] */
 	for (i = 0; i < 7; i++) {
 		idx = ch_indices[i];