Only in linux-2.6.19-rc5/arch/powerpc/kernel: vmlinux.lds
diff -ru linux-2.6.19-rc5.arnd/arch/powerpc/platforms/cell/setup.c linux-2.6.19-rc5/arch/powerpc/platforms/cell/setup.c
--- linux-2.6.19-rc5.arnd/arch/powerpc/platforms/cell/setup.c	2006-11-15 16:41:17.000000000 +0100
+++ linux-2.6.19-rc5/arch/powerpc/platforms/cell/setup.c	2006-11-15 16:44:41.000000000 +0100
@@ -117,8 +117,9 @@
 
 		/* The MPIC driver will get everything it needs from the
 		 * device-tree, just pass 0 to all arguments
+		 * Note: for now it has to be an Axon
 		 */
-		mpic = mpic_alloc(dn, 0, 0, 0, 0, " MPIC     ");
+		mpic = mpic_alloc(dn, 0, MPIC_IS_AXON, 0, 0, " MPIC     ");
 		if (mpic == NULL)
 			continue;
 		mpic_init(mpic);
diff -ru linux-2.6.19-rc5.arnd/arch/powerpc/sysdev/mpic.c linux-2.6.19-rc5/arch/powerpc/sysdev/mpic.c
--- linux-2.6.19-rc5.arnd/arch/powerpc/sysdev/mpic.c	2006-11-15 16:41:16.000000000 +0100
+++ linux-2.6.19-rc5/arch/powerpc/sysdev/mpic.c	2006-11-15 16:52:18.000000000 +0100
@@ -158,10 +158,10 @@
 				rb->dbase + reg + rb->doff);
 #endif
 	case mpic_access_mmio_be:
-		return in_be32(rb->base + (reg >> 2));
+		return in_be32(rb->base + ((reg * rb->stride) >> 2));
 	case mpic_access_mmio_le:
 	default:
-		return in_le32(rb->base + (reg >> 2));
+		return in_le32(rb->base + ((reg * rb->stride) >> 2));
 	}
 }
 
@@ -176,10 +176,10 @@
 				 rb->dbase + reg + rb->doff, value);
 #endif
 	case mpic_access_mmio_be:
-		return out_be32(rb->base + (reg >> 2), value);
+		return out_be32(rb->base + ((reg * rb->stride) >> 2), value);
 	case mpic_access_mmio_le:
 	default:
-		return out_le32(rb->base + (reg >> 2), value);
+		return out_le32(rb->base + ((reg * rb->stride) >> 2), value);
 	}
 }
 
@@ -259,7 +259,8 @@
 			   struct mpic_reg_bank *rb, unsigned int offset,
 			   unsigned int size)
 {
-	rb->base = ioremap(phys_addr + offset, size);
+	rb->stride = mpic->stride;
+	rb->base = ioremap(phys_addr + (offset * rb->stride),  rb->stride * size);
 	BUG_ON(rb->base == NULL);
 }
 
@@ -905,6 +906,7 @@
 	const char	*vers;
 	int		i;
 	u64		paddr = phys_addr;
+	unsigned int stride = 1;
 
 	mpic = alloc_bootmem(sizeof(struct mpic));
 	if (mpic == NULL)
@@ -948,13 +950,21 @@
 	if (node && get_property(node, "big-endian", NULL) != NULL)
 		mpic->flags |= MPIC_BIG_ENDIAN;
 
+	/* The CAB is still using the ioremaped type access but the dev tree */
+	/* is missing some info */
+	if (mpic->flags & MPIC_IS_AXON) {
+		mpic->flags |= MPIC_BIG_ENDIAN;
+		stride = 16;
+	}
+
+	mpic->stride = stride;
 
 #ifdef CONFIG_MPIC_WEIRD
-	mpic->hw_set = mpic_infos[MPIC_GET_REGSET(flags)];
+	mpic->hw_set = mpic_infos[MPIC_GET_REGSET(mpic->flags)];
 #endif
 
 	/* default register type */
-	mpic->reg_type = (flags & MPIC_BIG_ENDIAN) ?
+	mpic->reg_type = (mpic->flags & MPIC_BIG_ENDIAN) ?
 		mpic_access_mmio_be : mpic_access_mmio_le;
 
 	/* If no physical address is passed in, a device-node is mandatory */
@@ -992,7 +1002,7 @@
 	mpic_map(mpic, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
 
 	/* Reset */
-	if (flags & MPIC_WANTS_RESET) {
+	if (mpic->flags & MPIC_WANTS_RESET) {
 		mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
 			   mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
 			   | MPIC_GREG_GCONF_RESET);
@@ -1052,7 +1062,7 @@
 	mpic->next = mpics;
 	mpics = mpic;
 
-	if (flags & MPIC_PRIMARY) {
+	if (mpic->flags & MPIC_PRIMARY) {
 		mpic_primary = mpic;
 		irq_set_default_host(mpic->irqhost);
 	}
diff -ru linux-2.6.19-rc5.arnd/include/asm-powerpc/mpic.h linux-2.6.19-rc5/include/asm-powerpc/mpic.h
--- linux-2.6.19-rc5.arnd/include/asm-powerpc/mpic.h	2006-11-15 16:41:16.000000000 +0100
+++ linux-2.6.19-rc5/include/asm-powerpc/mpic.h	2006-11-15 16:43:43.000000000 +0100
@@ -236,6 +236,7 @@
 
 struct mpic_reg_bank {
 	u32 __iomem	*base;
+	u32             stride;
 #ifdef CONFIG_PPC_DCR
 	dcr_host_t	dhost;
 	unsigned int	dbase;
@@ -291,6 +292,8 @@
 	struct mpic_reg_bank	cpuregs[MPIC_MAX_CPUS];
 	struct mpic_reg_bank	isus[MPIC_MAX_ISU];
 
+        unsigned int stride;
+
 #ifdef CONFIG_PPC_DCR
 	unsigned int		dcr_base;
 #endif
@@ -332,6 +335,8 @@
 #define MPIC_NO_PTHROU_DIS		0x00000040
 /* DCR based MPIC */
 #define MPIC_USES_DCR			0x00000080
+/* AXON MPIC version */
+#define MPIC_IS_AXON			0x00000100
 
 /* MPIC HW modification ID */
 #define MPIC_REGSET_MASK		0xf0000000